target/linux/ifxmips/files/arch/mips/ifxmips/setup.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  *   Copyright (C) 2004 peng.liu@infineon.com
  17  *   Copyright (C) 2007 John Crispin <blogic@openwrt.org>
  18  */
  19
  20 #include <linux/init.h>
  21 #include <linux/cpu.h>
  22
  23 #include <asm/time.h>
  24 #include <asm/traps.h>
  25 #include <asm/irq.h>
  26 #include <asm/bootinfo.h>
  27
  28 #include <ifxmips.h>
  29 #include <ifxmips_irq.h>
  30 #include <ifxmips_pmu.h>
  31 #include <ifxmips_cgu.h>
  32 #include <ifxmips_prom.h>
  33
  34 static unsigned int r4k_offset;
  35 static unsigned int r4k_cur;
  36
  37 /* required in arch/mips/kernel/kspd.c */
  38 unsigned long cpu_khz;
  39
  40 extern void ifxmips_reboot_setup(void);
  41
  42 unsigned int ifxmips_get_cpu_ver(void)
  43 {
  44         return (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0xF0000000) >> 28;
  45 }
  46 EXPORT_SYMBOL(ifxmips_get_cpu_ver);
  47
  48 static inline u32 ifxmips_get_counter_resolution(void)
  49 {
  50         u32 res;
  51         __asm__ __volatile__(
  52                 ".set   push\n"
  53                 ".set   mips32r2\n"
  54                 ".set   noreorder\n"
  55                 "rdhwr  %0, $3\n"
  56                 "ehb\n"
  57                 ".set pop\n"
  58                 : "=&r" (res)
  59                 : /* no input */
  60                 : "memory");
  61         instruction_hazard();
  62         return res;
  63 }
  64
  65 void __init plat_time_init(void)
  66 {
  67         mips_hpt_frequency = ifxmips_get_cpu_hz() / ifxmips_get_counter_resolution();
  68         r4k_cur = (read_c0_count() + r4k_offset);
  69         write_c0_compare(r4k_cur);
  70
  71         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
  72         ifxmips_w32(0x100, IFXMIPS_GPTU_GPT_CLC); /* set clock divider to 1 */
  73         cpu_khz = ifxmips_get_cpu_hz();
  74 }
  75
  76 void __init plat_mem_setup(void)
  77 {
  78         u32 status;
  79         prom_printf("This %s system has a cpu rev of %d\n", get_system_type(), ifxmips_get_cpu_ver());
  80
  81         /* make sure to have no "reverse endian" for user mode! */
  82         status = read_c0_status();
  83         status &= (~(1<<25));
  84         write_c0_status(status);
  85
  86         ifxmips_reboot_setup();
  87
  88         ioport_resource.start = IOPORT_RESOURCE_START;
  89         ioport_resource.end = IOPORT_RESOURCE_END;
  90         iomem_resource.start = IOMEM_RESOURCE_START;
  91         iomem_resource.end = IOMEM_RESOURCE_END;
  92 }