[lantiq] dgn3500 support with eeprom loading from sysfs
[openwrt/svn-archive/archive.git] / target / linux / lantiq / patches-3.2 / 0024-MIPS-lantiq-convert-to-clkdev-api.patch
1 From a5124da58605e1717b57953bce56301ea0b33d25 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 8 Mar 2012 08:39:06 +0100
4 Subject: [PATCH 24/73] MIPS: lantiq: convert to clkdev api
5
6 * Change setup from HAVE_CLK -> HAVE_MACH_CLKDEV/CLKDEV_LOOKUP
7 * Add clk_activate/clk_deactivate
8 * Add better error paths to the clk_*() functions
9 * Change the way our static clocks are referenced
10
11 Signed-off-by: John Crispin <blogic@openwrt.org>
12 ---
13 arch/mips/Kconfig | 3 +-
14 arch/mips/include/asm/mach-lantiq/lantiq.h | 20 ++----
15 arch/mips/lantiq/clk.c | 96 +++++++++++++++------------
16 arch/mips/lantiq/clk.h | 52 ++++++++++++++-
17 arch/mips/lantiq/prom.c | 1 -
18 5 files changed, 111 insertions(+), 61 deletions(-)
19
20 --- a/arch/mips/Kconfig
21 +++ b/arch/mips/Kconfig
22 @@ -225,7 +225,8 @@ config LANTIQ
23 select ARCH_REQUIRE_GPIOLIB
24 select SWAP_IO_SPACE
25 select BOOT_RAW
26 - select HAVE_CLK
27 + select HAVE_MACH_CLKDEV
28 + select CLKDEV_LOOKUP
29 select HAVE_OPROFILE
30 select MIPS_MACHINE
31
32 --- a/arch/mips/include/asm/mach-lantiq/lantiq.h
33 +++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
34 @@ -9,6 +9,7 @@
35 #define _LANTIQ_H__
36
37 #include <linux/irq.h>
38 +#include <linux/clk.h>
39 #include <linux/ioport.h>
40
41 /* generic reg access functions */
42 @@ -22,18 +23,6 @@
43 extern unsigned int ltq_get_cpu_ver(void);
44 extern unsigned int ltq_get_soc_type(void);
45
46 -/* clock speeds */
47 -#define CLOCK_60M 60000000
48 -#define CLOCK_83M 83333333
49 -#define CLOCK_100M 100000000
50 -#define CLOCK_111M 111111111
51 -#define CLOCK_133M 133333333
52 -#define CLOCK_167M 166666667
53 -#define CLOCK_200M 200000000
54 -#define CLOCK_266M 266666666
55 -#define CLOCK_333M 333333333
56 -#define CLOCK_400M 400000000
57 -
58 /* spinlock all ebu i/o */
59 extern spinlock_t ebu_lock;
60
61 @@ -46,6 +35,13 @@ extern void ltq_disable_irq(struct irq_d
62 extern void ltq_mask_and_ack_irq(struct irq_data *data);
63 extern void ltq_enable_irq(struct irq_data *data);
64
65 +/* clock handling */
66 +extern int clk_activate(struct clk *clk);
67 +extern void clk_deactivate(struct clk *clk);
68 +extern struct clk *clk_get_cpu(void);
69 +extern struct clk *clk_get_fpi(void);
70 +extern struct clk *clk_get_io(void);
71 +
72 /* find out what caused the last cpu reset */
73 extern int ltq_reset_cause(void);
74
75 --- a/arch/mips/lantiq/clk.c
76 +++ b/arch/mips/lantiq/clk.c
77 @@ -12,6 +12,7 @@
78 #include <linux/kernel.h>
79 #include <linux/types.h>
80 #include <linux/clk.h>
81 +#include <linux/clkdev.h>
82 #include <linux/err.h>
83 #include <linux/list.h>
84
85 @@ -24,33 +25,29 @@
86 #include "clk.h"
87 #include "prom.h"
88
89 -struct clk {
90 - const char *name;
91 - unsigned long rate;
92 - unsigned long (*get_rate) (void);
93 -};
94 +/* lantiq socs have 3 static clocks */
95 +static struct clk cpu_clk_generic[3];
96
97 -static struct clk *cpu_clk;
98 -static int cpu_clk_cnt;
99 +void clkdev_add_static(unsigned long cpu, unsigned long fpi, unsigned long io)
100 +{
101 + cpu_clk_generic[0].rate = cpu;
102 + cpu_clk_generic[1].rate = fpi;
103 + cpu_clk_generic[2].rate = io;
104 +}
105
106 -/* lantiq socs have 3 static clocks */
107 -static struct clk cpu_clk_generic[] = {
108 - {
109 - .name = "cpu",
110 - .get_rate = ltq_get_cpu_hz,
111 - }, {
112 - .name = "fpi",
113 - .get_rate = ltq_get_fpi_hz,
114 - }, {
115 - .name = "io",
116 - .get_rate = ltq_get_io_region_clock,
117 - },
118 -};
119 +struct clk *clk_get_cpu(void)
120 +{
121 + return &cpu_clk_generic[0];
122 +}
123 +
124 +struct clk *clk_get_fpi(void)
125 +{
126 + return &cpu_clk_generic[1];
127 +}
128
129 -void clk_init(void)
130 +struct clk *clk_get_io(void)
131 {
132 - cpu_clk = cpu_clk_generic;
133 - cpu_clk_cnt = ARRAY_SIZE(cpu_clk_generic);
134 + return &cpu_clk_generic[2];
135 }
136
137 static inline int clk_good(struct clk *clk)
138 @@ -73,36 +70,49 @@ unsigned long clk_get_rate(struct clk *c
139 }
140 EXPORT_SYMBOL(clk_get_rate);
141
142 -struct clk *clk_get(struct device *dev, const char *id)
143 +int clk_enable(struct clk *clk)
144 {
145 - int i;
146 + if (unlikely(!clk_good(clk)))
147 + return -1;
148
149 - for (i = 0; i < cpu_clk_cnt; i++)
150 - if (!strcmp(id, cpu_clk[i].name))
151 - return &cpu_clk[i];
152 - BUG();
153 - return ERR_PTR(-ENOENT);
154 + if (clk->enable)
155 + return clk->enable(clk);
156 +
157 + return -1;
158 }
159 -EXPORT_SYMBOL(clk_get);
160 +EXPORT_SYMBOL(clk_enable);
161
162 -void clk_put(struct clk *clk)
163 +void clk_disable(struct clk *clk)
164 {
165 - /* not used */
166 + if (unlikely(!clk_good(clk)))
167 + return;
168 +
169 + if (clk->disable)
170 + clk->disable(clk);
171 }
172 -EXPORT_SYMBOL(clk_put);
173 +EXPORT_SYMBOL(clk_disable);
174
175 -int clk_enable(struct clk *clk)
176 +int clk_activate(struct clk *clk)
177 {
178 - /* not used */
179 - return 0;
180 + if (unlikely(!clk_good(clk)))
181 + return -1;
182 +
183 + if (clk->activate)
184 + return clk->activate(clk);
185 +
186 + return -1;
187 }
188 -EXPORT_SYMBOL(clk_enable);
189 +EXPORT_SYMBOL(clk_activate);
190
191 -void clk_disable(struct clk *clk)
192 +void clk_deactivate(struct clk *clk)
193 {
194 - /* not used */
195 + if (unlikely(!clk_good(clk)))
196 + return;
197 +
198 + if (clk->deactivate)
199 + clk->deactivate(clk);
200 }
201 -EXPORT_SYMBOL(clk_disable);
202 +EXPORT_SYMBOL(clk_deactivate);
203
204 static inline u32 ltq_get_counter_resolution(void)
205 {
206 @@ -126,7 +136,7 @@ void __init plat_time_init(void)
207
208 ltq_soc_init();
209
210 - clk = clk_get(0, "cpu");
211 + clk = clk_get_cpu();
212 mips_hpt_frequency = clk_get_rate(clk) / ltq_get_counter_resolution();
213 write_c0_compare(read_c0_count());
214 pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
215 --- a/arch/mips/lantiq/clk.h
216 +++ b/arch/mips/lantiq/clk.h
217 @@ -9,10 +9,54 @@
218 #ifndef _LTQ_CLK_H__
219 #define _LTQ_CLK_H__
220
221 -extern void clk_init(void);
222 +#include <linux/clkdev.h>
223
224 -extern unsigned long ltq_get_cpu_hz(void);
225 -extern unsigned long ltq_get_fpi_hz(void);
226 -extern unsigned long ltq_get_io_region_clock(void);
227 +/* clock speeds */
228 +#define CLOCK_60M 60000000
229 +#define CLOCK_62_5M 62500000
230 +#define CLOCK_83M 83333333
231 +#define CLOCK_83_5M 83500000
232 +#define CLOCK_98_304M 98304000
233 +#define CLOCK_100M 100000000
234 +#define CLOCK_111M 111111111
235 +#define CLOCK_125M 125000000
236 +#define CLOCK_133M 133333333
237 +#define CLOCK_150M 150000000
238 +#define CLOCK_166M 166666666
239 +#define CLOCK_167M 166666667
240 +#define CLOCK_196_608M 196608000
241 +#define CLOCK_200M 200000000
242 +#define CLOCK_250M 250000000
243 +#define CLOCK_266M 266666666
244 +#define CLOCK_300M 300000000
245 +#define CLOCK_333M 333333333
246 +#define CLOCK_393M 393215332
247 +#define CLOCK_400M 400000000
248 +#define CLOCK_500M 500000000
249 +#define CLOCK_600M 600000000
250 +
251 +struct clk {
252 + struct clk_lookup cl;
253 + unsigned long rate;
254 + unsigned long (*get_rate) (void);
255 + unsigned int module;
256 + unsigned int bits;
257 + int (*enable) (struct clk *clk);
258 + void (*disable) (struct clk *clk);
259 + int (*activate) (struct clk *clk);
260 + void (*deactivate) (struct clk *clk);
261 + void (*reboot) (struct clk *clk);
262 +};
263 +
264 +extern void clkdev_add_static(unsigned long cpu, unsigned long fpi,
265 + unsigned long io);
266 +
267 +extern unsigned long ltq_danube_cpu_hz(void);
268 +extern unsigned long ltq_danube_fpi_hz(void);
269 +extern unsigned long ltq_danube_io_region_clock(void);
270 +
271 +extern unsigned long ltq_vr9_cpu_hz(void);
272 +extern unsigned long ltq_vr9_fpi_hz(void);
273 +extern unsigned long ltq_vr9_io_region_clock(void);
274
275 #endif
276 --- a/arch/mips/lantiq/prom.c
277 +++ b/arch/mips/lantiq/prom.c
278 @@ -103,7 +103,6 @@ EXPORT_SYMBOL(ltq_remap_resource);
279 void __init prom_init(void)
280 {
281 ltq_soc_detect(&soc_info);
282 - clk_init();
283 snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s",
284 soc_info.name, soc_info.rev_type);
285 soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';