[coldfire]: 2.6.31 support (WiP)
authorImre Kaloz <kaloz@openwrt.org>
Mon, 22 Nov 2010 13:29:58 +0000 (13:29 +0000)
committerImre Kaloz <kaloz@openwrt.org>
Mon, 22 Nov 2010 13:29:58 +0000 (13:29 +0000)
SVN-Revision: 24087

61 files changed:
target/linux/coldfire/Makefile
target/linux/coldfire/config-default
target/linux/coldfire/files-2.6.31/arch/m68k/boot/Makefile [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/Makefile [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/Makefile [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/cache.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/entry.S [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/head.S [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/ints.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/muldi3.S [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/signal.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/time.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/traps.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_dma.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_dmaApi.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_progCheck.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasks.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasksInit.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasksInit.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/Makefile [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/config.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/devices.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/dma.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/mcf548x-devices.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/MCD_dma.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/asm-offsets.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_548x_cacheflush.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_bitops.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_cacheflush.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_entry.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_io.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_page.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_pgalloc.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_pgtable.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_raw_io.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_tlbflush.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_uaccess.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cf_virtconvert.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cfcache.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cfmmu.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485dma.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485dspi.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485gpio.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485gpt.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485pci.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485psc.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485sec.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485sim.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/m5485sram.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/mcffec.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/kernel/vmlinux-cf.lds [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/arch/m68k/mm/cf-mmu.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/drivers/net/fec_m547x.c [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/drivers/net/fec_m547x.h [new file with mode: 0644]
target/linux/coldfire/files-2.6.31/drivers/net/phy/broadcom522x.c [new file with mode: 0644]
target/linux/coldfire/patches-2.6.31/001-coldfire_support.patch [new file with mode: 0644]
target/linux/coldfire/patches-2.6.31/005-Add-common-serial-driver-and-add-IRDA-for-m5.patch [new file with mode: 0644]
target/linux/coldfire/patches-2.6.31/006-mcf548x_ethernet.patch [new file with mode: 0644]
target/linux/coldfire/patches-2.6.31/007-bcm5222_phy.patch [new file with mode: 0644]
target/linux/coldfire/patches-2.6.31/019-Add-CFV4E-FPU-support-for-MCF547X_8X.patch [new file with mode: 0644]
target/linux/coldfire/patches-2.6.31/074-Kconfig_lite_boards.patch [new file with mode: 0644]

index a1848c1..eb250d5 100644 (file)
@@ -1,5 +1,5 @@
 #
-# Copyright (C) 2009 OpenWrt.org
+# Copyright (C) 2009-2010 OpenWrt.org
 #
 # This is free software, licensed under the GNU General Public License v2.
 # See /LICENSE for more information.
@@ -12,7 +12,7 @@ BOARDNAME:=Freescale Coldfire v4e
 FEATURES:=squashfs broken
 MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
 
-LINUX_VERSION:=2.6.25.20
+LINUX_VERSION:=2.6.31.14
 
 include $(INCLUDE_DIR)/target.mk
 
index 245cd1c..8898ae1 100644 (file)
@@ -1,3 +1,17 @@
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_START=0xff800000
+# CONFIG_MTD_PHYSMAP_COMPAT=y
+# CONFIG_MTD_PHYSMAP_LEN=0x400000
+# CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_DMADEVICES=y
+CONFIG_CFDMA=y
+CONFIG_FEC_548x_SHARED_PHY=y
+CONFIG_FPU=y
+# CONFIG_M5474LITE is not set
+CONFIG_M5484LITE=y
+# CONFIG_M5441X is not set
+# CONFIG_VDSO is not set
+CONFIG_BROADCOM5222_PHY=y
 # CONFIG_8139TOO is not set
 CONFIG_ADVANCED=y
 # CONFIG_AMIGA is not set
@@ -47,7 +61,7 @@ CONFIG_M547X_8X=y
 # CONFIG_M547X is not set
 # CONFIG_M5485AFE is not set
 # CONFIG_M5485BFE is not set
-CONFIG_M5485CFE=y
+# CONFIG_M5485CFE is not set
 # CONFIG_M5485DFE is not set
 # CONFIG_M5485EFE is not set
 # CONFIG_M5485FFE is not set
@@ -86,7 +100,10 @@ CONFIG_SDRAM_SIZE=0x04000000
 # CONFIG_SERIAL_COLDFIRE_IRDA is not set
 CONFIG_SERIAL_COLDFIRE=y
 # CONFIG_SERIAL_CONSOLE is not set
-# CONFIG_SERIAL_MCF is not set
+CONFIG_SERIAL_MCF=y
+# CONFIG_SERIAL_COLDFIRE_EDMA is not set
+CONFIG_SERIAL_MCF_BAUDRATE=115200
+CONFIG_SERIAL_MCF_CONSOLE=y
 CONFIG_SINGLE_MEMORY_CHUNK=y
 CONFIG_SLABINFO=y
 # CONFIG_SUN3 is not set
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/boot/Makefile b/target/linux/coldfire/files-2.6.31/arch/m68k/boot/Makefile
new file mode 100644 (file)
index 0000000..36397b1
--- /dev/null
@@ -0,0 +1,68 @@
+#
+# arch/m68k/boot/Makefile
+#
+# Based on arch/sh/boot/Makefile by Stuart Menefy
+#
+# Copyright (c) 2008 Freescale Semiconductor, Inc.  All Rights Reserved.
+#      by Kurt Mahan <kmahan@freescale.com>
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+
+MKIMAGE := $(srctree)/scripts/mkuboot.sh
+
+#
+# Assign safe dummy values if these variables are not defined,
+# in order to suppress error message.
+#
+CONFIG_SDRAM_BASE      ?= 0x40000000
+CONFIG_IMG_START       ?= 0x00020000
+
+export CONFIG_SDRAM_BASE CONFIG_IMG_START
+
+targets := zImage zImage.srec vmlinux.srec uImage uImage.srec
+
+$(obj)/zImage: $(obj)/vmlinux.bin FORCE
+       $(call if_changed,gzip)
+       @echo '  Image $@ is ready'
+
+OBJCOPYFLAGS_zImage.srec := -I binary -O srec
+$(obj)/zImage.srec: $(obj)/zImage
+       $(call if_changed,objcopy)
+
+KERNEL_LOAD    := $(shell /bin/bash -c 'printf "0x%08x" \
+                    $$[$(CONFIG_SDRAM_BASE)  + \
+                       $(CONFIG_IMG_START)]')
+
+KERNEL_ENTRY   := $(shell /bin/bash -c 'printf "0x%08x" \
+                    $$[$(CONFIG_SDRAM_BASE)  + \
+                       $(CONFIG_IMG_START)]')
+
+quiet_cmd_uimage = UIMAGE  $@
+       cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A m68k -O linux -T kernel \
+                  -C gzip -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
+                  -n 'Linux-$(KERNELRELEASE)' -d $< $@
+
+$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE
+       $(call if_changed,uimage)
+       @echo '  Image $@ is ready'
+
+$(obj)/vmlinux.bin: vmlinux FORCE
+       $(call if_changed,objcopy)
+
+$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
+       $(call if_changed,gzip)
+
+OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec
+$(obj)/vmlinux.srec: $(obj)/vmlinux.bin
+       $(call if_changed,objcopy)
+
+OBJCOPYFLAGS_uImage.srec := -I binary -O srec
+$(obj)/uImage.srec: $(obj)/uImage
+       $(call if_changed,objcopy)
+
+clean-files    += uImage uImage.srec \
+                  zImage zImage.srec \
+                  vmlinux.srec vmlinux.bin vmlinux.bin.gz
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/Makefile b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/Makefile
new file mode 100644 (file)
index 0000000..1b39579
--- /dev/null
@@ -0,0 +1,9 @@
+#
+# Makefile for Linux arch/m68k/coldfire source directory
+#
+
+obj-y += common/
+obj-$(CONFIG_VDSO)      += vdso/
+
+obj-$(CONFIG_M5445X)   += m5445x/
+obj-$(CONFIG_M547X_8X) += m547x/
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/Makefile b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/Makefile
new file mode 100644 (file)
index 0000000..4d9a016
--- /dev/null
@@ -0,0 +1,7 @@
+#
+# Makefile for Linux arch/m68k/coldfire/common source directory
+#
+
+obj-y:= entry.o cache.o signal.o muldi3.o traps.o ints.o time.o
+extra-y:= head.o
+
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/cache.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/cache.c
new file mode 100644 (file)
index 0000000..493d9fa
--- /dev/null
@@ -0,0 +1,45 @@
+/*
+ *  linux/arch/m68k/coldfire/cache.c
+ *
+ *  Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Matt Waddel Matt.Waddel@freescale.com
+ *  Kurt Mahan kmahan@freescale.com
+ *  Jason Jin Jason.Jin@freescale.com
+ *  Shrek Wu B16972@freescale.com
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ */
+
+#include <linux/interrupt.h>
+#include <asm/cfcache.h>
+#include <asm/coldfire.h>
+#include <asm/system.h>
+
+/* Cache Control Reg shadow reg */
+unsigned long shadow_cacr;
+
+/**
+ * cacr_set - Set the Cache Control Register
+ * @x Value to set
+ */
+void cacr_set(unsigned long x)
+{
+       shadow_cacr = x;
+
+       __asm__ __volatile__ ("movec %0, %%cacr"
+                             : /* no outputs */
+                             : "r" (shadow_cacr));
+}
+
+/**
+ * cacr_get - Get the current value of the Cache Control Register
+ *
+ * @return CACR value
+ */
+unsigned long cacr_get(void)
+{
+       return shadow_cacr;
+}
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/entry.S b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/entry.S
new file mode 100644 (file)
index 0000000..d011690
--- /dev/null
@@ -0,0 +1,749 @@
+/*
+ *  arch/m68k/coldfire/entry.S
+ *
+ *  Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Matt Waddel Matt.Waddel@freescale.com
+ *  Kurt Mahan kmahan@freescale.com
+ *  Jason Jin Jason.Jin@freescale.com
+ *  Shrek Wu B16972@freescale.com
+ *
+ * Based on:
+ *
+ *  arch/m68knommu/platform/5307/entry.S &
+ *  arch/m68k/kernel/entry.S
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file README.legal in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/cf_entry.h>
+#include <asm/errno.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/traps.h>
+#include <asm/unistd.h>
+
+/*
+ * TASK_INFO:
+ *
+ *  - TINFO_PREEMPT (struct thread_info / preempt_count)
+ *      Used to keep track of preemptability
+ *  - TINFO_FLAGS (struct thread_info / flags - include/asm-m68k/thread_info.h)
+ *      Various bit flags that are checked for scheduling/tracing
+ *     Bits 0-7  are checked every exception exit
+ *          8-15 are checked every syscall exit
+ *
+ *      TIF_SIGPENDING         6
+ *      TIF_NEED_RESCHED       7
+ *      TIF_DELAYED_TRACE      14
+ *      TIF_SYSCALL_TRACE      15
+ *      TIF_MEMDIE             16 (never checked here)
+ */
+
+.bss
+
+sw_ksp:
+.long  0
+
+sw_usp:
+.long  0
+
+.text
+
+.globl system_call
+.globl buserr
+.globl trap
+.globl resume
+.globl ret_from_exception
+.globl ret_from_signal
+.globl sys_call_table
+.globl ret_from_interrupt
+.globl inthandler
+
+ENTRY(buserr)
+#ifdef CONFIG_COLDFIRE_FOO
+       movew   #0x2700,%sr             /* lock interrupts */
+#endif
+       SAVE_ALL_INT
+#ifdef CONFIG_COLDFIRE_FOO
+       movew   PT_SR(%sp),%d3          /* get original %sr */
+       oril    #0x2000,%d3             /* set supervisor mode in it */
+       movew   %d3,%sr                 /* recover irq state */
+#endif
+       GET_CURRENT(%d0)
+       movel   %sp,%sp@-               /* stack frame pointer argument */
+       jsr     buserr_c
+       addql   #4,%sp
+       jra     .Lret_from_exception
+
+ENTRY(trap)
+       SAVE_ALL_INT
+       GET_CURRENT(%d0)
+       movel   %sp,%sp@-               /* stack frame pointer argument */
+       jsr     trap_c
+       addql   #4,%sp
+       jra     .Lret_from_exception
+
+       /* After a fork we jump here directly from resume,
+          %d1 contains the previous task schedule_tail */
+ENTRY(ret_from_fork)
+       movel   %d1,%sp@-
+       jsr     schedule_tail
+       addql   #4,%sp
+       jra     .Lret_from_exception
+
+do_trace_entry:
+       movel   #-ENOSYS,%d1            /* needed for strace */
+       movel   %d1,%sp@(PT_D0)
+       subql   #4,%sp
+       SAVE_SWITCH_STACK
+       jbsr    syscall_trace
+       RESTORE_SWITCH_STACK
+       addql   #4,%sp
+       movel   %sp@(PT_ORIG_D0),%d0
+       cmpl    #NR_syscalls,%d0
+       jcs     syscall
+badsys:
+       movel   #-ENOSYS,%d1
+       movel   %d1,%sp@(PT_D0)
+       jra     ret_from_exception
+
+do_trace_exit:
+       subql   #4,%sp
+       SAVE_SWITCH_STACK
+       jbsr    syscall_trace
+       RESTORE_SWITCH_STACK
+       addql   #4,%sp
+       jra     .Lret_from_exception
+
+ENTRY(ret_from_signal)
+       RESTORE_SWITCH_STACK
+       addql   #4,%sp
+       jra     .Lret_from_exception
+
+ENTRY(system_call)
+       SAVE_ALL_SYS
+
+       GET_CURRENT(%d1)
+       /* save top of frame */
+       movel   %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
+
+       /* syscall trace */
+       tstb    %curptr@(TASK_INFO+TINFO_FLAGS+2)
+       jmi     do_trace_entry          /* SYSCALL_TRACE is set */
+       cmpl    #NR_syscalls,%d0
+       jcc     badsys
+syscall:
+       movel   #sys_call_table,%a0
+       asll    #2,%d0
+       addl    %d0,%a0
+       movel   %a0@,%a0
+       jsr     %a0@
+       movel   %d0,%sp@(PT_D0)         /* save the return value */
+ret_from_syscall:
+       movew   %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
+       jne     syscall_exit_work       /* flags set so process */
+1:     RESTORE_ALL
+
+syscall_exit_work:
+       btst    #5,%sp@(PT_SR)          /* check if returning to kernel */
+       bnes    1b                      /* if so, skip resched, signals */
+
+       btstl   #15,%d0                 /* check if SYSCALL_TRACE */
+       jne     do_trace_exit
+       btstl   #14,%d0                 /* check if DELAYED_TRACE */
+       jne     do_delayed_trace
+       btstl   #6,%d0                  /* check if SIGPENDING */
+       jne     do_signal_return
+       pea     resume_userspace
+       jra     schedule
+
+ENTRY(ret_from_exception)
+.Lret_from_exception:
+       btst    #5,%sp@(PT_SR)          /* check if returning to kernel */
+       bnes    1f                      /* if so, skip resched, signals */
+       movel   %d0,%sp@-               /* Only allow interrupts when we are  */
+       move    %sr,%d0                 /* last one on the kernel stack,      */
+       andl    #ALLOWINT,%d0           /* otherwise stack overflow can occur */
+       move    %d0,%sr                 /* during heavy interrupt load.       */
+       movel   %sp@+,%d0
+
+resume_userspace:
+       moveb   %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
+       jne     exit_work       /* SIGPENDING and/or NEED_RESCHED set */
+1:     RESTORE_ALL
+
+exit_work:
+       /* save top of frame */
+       movel   %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
+       btstl   #6,%d0                  /* check for SIGPENDING in flags */
+       jne     do_signal_return
+       pea     resume_userspace
+       jra     schedule
+
+do_signal_return:
+       subql   #4,%sp                  /* dummy return address */
+       SAVE_SWITCH_STACK
+       pea     %sp@(SWITCH_STACK_SIZE)
+       clrl    %sp@-
+       bsrl    do_signal
+       addql   #8,%sp
+       RESTORE_SWITCH_STACK
+       addql   #4,%sp
+       jbra    resume_userspace
+
+do_delayed_trace:
+       bclr    #7,%sp@(PT_SR)          /* clear trace bit in SR */
+       pea     1                       /* send SIGTRAP */
+       movel   %curptr,%sp@-
+       pea     LSIGTRAP
+       jbsr    send_sig
+       addql   #8,%sp
+       addql   #4,%sp
+       jbra    resume_userspace
+
+/*
+ * This is the interrupt handler (for all hardware interrupt
+ * sources). It figures out the vector number and calls the appropriate
+ * interrupt service routine directly.
+ */
+ENTRY(inthandler)
+       SAVE_ALL_INT
+       GET_CURRENT(%d0)
+       movel   %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
+       addil   #0x10000,%d0
+       movel   %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
+       /* put exception # in d0 */
+       movel   %sp@(PT_VECTOR),%d0
+       swap    %d0                     /* extract bits 25:18 */
+       lsrl    #2,%d0
+       andl    #0x0ff,%d0
+
+       movel   %sp,%sp@-
+       movel   %d0,%sp@-               /* put vector # on stack */
+auto_irqhandler_fixup = . + 2
+       jbsr    process_int             /* process the IRQ */
+       addql   #8,%sp                  /* pop parameters off stack */
+
+ret_from_interrupt:
+
+       movel   %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
+       subil   #0x10000,%d0
+       movel   %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
+       jeq     ret_from_last_interrupt
+2:     RESTORE_ALL
+
+       ALIGN
+ret_from_last_interrupt:
+       moveb   %sp@(PT_SR),%d0
+       andl    #(~ALLOWINT>>8)&0xff,%d0
+       jne     2b
+
+       /* check if we need to do software interrupts */
+       tstl    irq_stat+CPUSTAT_SOFTIRQ_PENDING
+       jeq     .Lret_from_exception
+       pea     ret_from_exception
+       jra     do_softirq
+
+ENTRY(user_inthandler)
+       SAVE_ALL_INT
+       GET_CURRENT(%d0)
+       movel   %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
+       addil   #0x10000,%d0
+       movel   %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
+       /* put exception # in d0 */
+       movel   %sp@(PT_VECTOR),%d0
+user_irqvec_fixup = . + 2
+       swap    %d0                     /* extract bits 25:18 */
+       lsrl    #2,%d0
+       andl    #0x0ff,%d0
+
+       movel   %sp,%sp@-
+       movel   %d0,%sp@-               /* put vector # on stack */
+user_irqhandler_fixup = . + 2
+       jbsr    process_int             /* process the IRQ */
+       addql   #8,%sp                  /* pop parameters off stack */
+
+       movel   %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
+       subil   #0x10000,%d0
+       movel   %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
+       jeq     ret_from_last_interrupt
+        RESTORE_ALL
+
+/* Handler for uninitialized and spurious interrupts */
+
+ENTRY(bad_inthandler)
+       SAVE_ALL_INT
+       GET_CURRENT(%d0)
+       movel   %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
+       addil   #0x10000,%d0
+       movel   %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
+
+       movel   %sp,%sp@-
+       jsr     handle_badint
+       addql   #4,%sp
+
+       movel   %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
+       subil   #0x10000,%d0
+       movel   %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
+       jeq     ret_from_last_interrupt
+       RESTORE_ALL
+
+ENTRY(sys_fork)
+       SAVE_SWITCH_STACK
+       pea     %sp@(SWITCH_STACK_SIZE)
+       jbsr    m68k_fork
+       addql   #4,%sp
+       RESTORE_SWITCH_STACK
+       rts
+
+ENTRY(sys_clone)
+       SAVE_SWITCH_STACK
+       pea     %sp@(SWITCH_STACK_SIZE)
+       jbsr    m68k_clone
+       addql   #4,%sp
+       RESTORE_SWITCH_STACK
+       rts
+
+ENTRY(sys_vfork)
+       SAVE_SWITCH_STACK
+       pea     %sp@(SWITCH_STACK_SIZE)
+       jbsr    m68k_vfork
+       addql   #4,%sp
+       RESTORE_SWITCH_STACK
+       rts
+
+ENTRY(sys_sigsuspend)
+       SAVE_SWITCH_STACK
+       pea     %sp@(SWITCH_STACK_SIZE)
+       jbsr    do_sigsuspend
+       addql   #4,%sp
+       RESTORE_SWITCH_STACK
+       rts
+
+ENTRY(sys_rt_sigsuspend)
+       SAVE_SWITCH_STACK
+       pea     %sp@(SWITCH_STACK_SIZE)
+       jbsr    do_rt_sigsuspend
+       addql   #4,%sp
+       RESTORE_SWITCH_STACK
+       rts
+
+ENTRY(sys_sigreturn)
+       SAVE_SWITCH_STACK
+       jbsr    do_sigreturn
+       RESTORE_SWITCH_STACK
+       rts
+
+ENTRY(sys_rt_sigreturn)
+       SAVE_SWITCH_STACK
+       jbsr    do_rt_sigreturn
+       RESTORE_SWITCH_STACK
+       rts
+
+resume:
+       /*
+        * Beware - when entering resume, prev (the current task) is
+        * in a0, next (the new task) is in a1,so don't change these
+        * registers until their contents are no longer needed.
+        */
+
+       /* save sr */
+       movew   %sr,%d0
+       movew   %d0,%a0@(TASK_THREAD+THREAD_SR)
+
+       /* save usp */
+       /* Save USP via %a1 (which is saved/restored from %d0) */
+       movel   %a1,%d0
+       movel   %usp,%a1
+       movel   %a1,%a0@(TASK_THREAD+THREAD_USP)
+       movel   %d0,%a1
+
+       /* save non-scratch registers on stack */
+       SAVE_SWITCH_STACK
+
+       /* save current kernel stack pointer */
+       movel   %sp,%a0@(TASK_THREAD+THREAD_KSP)
+#ifdef CONFIG_FPU
+       /* save floating point context */
+       fsave   %a0@(TASK_THREAD+THREAD_FPSTATE)
+
+1:     tstb    %a0@(TASK_THREAD+THREAD_FPSTATE)
+       jeq     3f
+2:
+       fmovemd %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
+3:
+#endif
+       /* Return previous task in %d1 */
+       movel   %curptr,%d1
+
+       /* switch to new task (a1 contains new task) */
+       movel   %a1,%curptr
+#ifdef CONFIG_FPU
+       /* restore floating point context */
+1:     tstb    %a1@(TASK_THREAD+THREAD_FPSTATE)
+       jeq     3f
+2:
+       fmovemd %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
+/*     frestore        %a1@(TASK_THREAD+THREAD_FPCNTL)*/
+3:     frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
+#endif
+       /* restore the kernel stack pointer */
+       movel   %a1@(TASK_THREAD+THREAD_KSP),%sp
+
+       /* restore non-scratch registers */
+       RESTORE_SWITCH_STACK
+
+       /* restore user stack pointer */
+       movel   %a1@(TASK_THREAD+THREAD_USP),%a0
+       movel   %a0,%usp
+
+       /* restore status register */
+       movew   %a1@(TASK_THREAD+THREAD_SR),%d0
+       movew   %d0,%sr
+
+       rts
+
+.data
+ALIGN
+sys_call_table:
+       .long sys_ni_syscall    /* 0  -  old "setup()" system call*/
+       .long sys_exit
+       .long sys_fork
+       .long sys_read
+       .long sys_write
+       .long sys_open          /* 5 */
+       .long sys_close
+       .long sys_waitpid
+       .long sys_creat
+       .long sys_link
+       .long sys_unlink        /* 10 */
+       .long sys_execve
+       .long sys_chdir
+       .long sys_time
+       .long sys_mknod
+       .long sys_chmod         /* 15 */
+       .long sys_chown16
+       .long sys_ni_syscall                    /* old break syscall holder */
+       .long sys_stat
+       .long sys_lseek
+       .long sys_getpid        /* 20 */
+       .long sys_mount
+       .long sys_oldumount
+       .long sys_setuid16
+       .long sys_getuid16
+       .long sys_stime         /* 25 */
+       .long sys_ptrace
+       .long sys_alarm
+       .long sys_fstat
+       .long sys_pause
+       .long sys_utime         /* 30 */
+       .long sys_ni_syscall                    /* old stty syscall holder */
+       .long sys_ni_syscall                    /* old gtty syscall holder */
+       .long sys_access
+       .long sys_nice
+       .long sys_ni_syscall    /* 35 */        /* old ftime syscall holder */
+       .long sys_sync
+       .long sys_kill
+       .long sys_rename
+       .long sys_mkdir
+       .long sys_rmdir         /* 40 */
+       .long sys_dup
+       .long sys_pipe
+       .long sys_times
+       .long sys_ni_syscall                    /* old prof syscall holder */
+       .long sys_brk           /* 45 */
+       .long sys_setgid16
+       .long sys_getgid16
+       .long sys_signal
+       .long sys_geteuid16
+       .long sys_getegid16     /* 50 */
+       .long sys_acct
+       .long sys_umount                        /* recycled never used phys() */
+       .long sys_ni_syscall                    /* old lock syscall holder */
+       .long sys_ioctl
+       .long sys_fcntl         /* 55 */
+       .long sys_ni_syscall                    /* old mpx syscall holder */
+       .long sys_setpgid
+       .long sys_ni_syscall                    /* old ulimit syscall holder */
+       .long sys_ni_syscall
+       .long sys_umask         /* 60 */
+       .long sys_chroot
+       .long sys_ustat
+       .long sys_dup2
+       .long sys_getppid
+       .long sys_getpgrp       /* 65 */
+       .long sys_setsid
+       .long sys_sigaction
+       .long sys_sgetmask
+       .long sys_ssetmask
+       .long sys_setreuid16    /* 70 */
+       .long sys_setregid16
+       .long sys_sigsuspend
+       .long sys_sigpending
+       .long sys_sethostname
+       .long sys_setrlimit     /* 75 */
+       .long sys_old_getrlimit
+       .long sys_getrusage
+       .long sys_gettimeofday
+       .long sys_settimeofday
+       .long sys_getgroups16   /* 80 */
+       .long sys_setgroups16
+       .long old_select
+       .long sys_symlink
+       .long sys_lstat
+       .long sys_readlink      /* 85 */
+       .long sys_uselib
+       .long sys_swapon
+       .long sys_reboot
+       .long sys_old_readdir
+       .long old_mmap          /* 90 */
+       .long sys_munmap
+       .long sys_truncate
+       .long sys_ftruncate
+       .long sys_fchmod
+       .long sys_fchown16      /* 95 */
+       .long sys_getpriority
+       .long sys_setpriority
+       .long sys_ni_syscall                    /* old profil syscall holder */
+       .long sys_statfs
+       .long sys_fstatfs       /* 100 */
+       .long sys_ni_syscall                    /* ioperm for i386 */
+       .long sys_socketcall
+       .long sys_syslog
+       .long sys_setitimer
+       .long sys_getitimer     /* 105 */
+       .long sys_newstat
+       .long sys_newlstat
+       .long sys_newfstat
+       .long sys_ni_syscall
+       .long sys_ni_syscall    /* 110 */       /* iopl for i386 */
+       .long sys_vhangup
+       .long sys_ni_syscall                    /* obsolete idle() syscall */
+       .long sys_ni_syscall                    /* vm86old for i386 */
+       .long sys_wait4
+       .long sys_swapoff       /* 115 */
+       .long sys_sysinfo
+       .long sys_ipc
+       .long sys_fsync
+       .long sys_sigreturn
+       .long sys_clone         /* 120 */
+       .long sys_setdomainname
+       .long sys_newuname
+       .long sys_cacheflush                    /* modify_ldt for i386 */
+       .long sys_adjtimex
+       .long sys_mprotect      /* 125 */
+       .long sys_sigprocmask
+       .long sys_ni_syscall                    /* old "create_module" */
+       .long sys_init_module
+       .long sys_delete_module
+       .long sys_ni_syscall    /* 130 - old "get_kernel_syms" */
+       .long sys_quotactl
+       .long sys_getpgid
+       .long sys_fchdir
+       .long sys_bdflush
+       .long sys_sysfs         /* 135 */
+       .long sys_personality
+       .long sys_ni_syscall                    /* for afs_syscall */
+       .long sys_setfsuid16
+       .long sys_setfsgid16
+       .long sys_llseek        /* 140 */
+       .long sys_getdents
+       .long sys_select
+       .long sys_flock
+       .long sys_msync
+       .long sys_readv         /* 145 */
+       .long sys_writev
+       .long sys_getsid
+       .long sys_fdatasync
+       .long sys_sysctl
+       .long sys_mlock         /* 150 */
+       .long sys_munlock
+       .long sys_mlockall
+       .long sys_munlockall
+       .long sys_sched_setparam
+       .long sys_sched_getparam        /* 155 */
+       .long sys_sched_setscheduler
+       .long sys_sched_getscheduler
+       .long sys_sched_yield
+       .long sys_sched_get_priority_max
+       .long sys_sched_get_priority_min  /* 160 */
+       .long sys_sched_rr_get_interval
+       .long sys_nanosleep
+       .long sys_mremap
+       .long sys_setresuid16
+       .long sys_getresuid16   /* 165 */
+       .long sys_getpagesize
+       .long sys_ni_syscall                    /* old sys_query_module */
+       .long sys_poll
+       .long sys_nfsservctl
+       .long sys_setresgid16   /* 170 */
+       .long sys_getresgid16
+       .long sys_prctl
+       .long sys_rt_sigreturn
+       .long sys_rt_sigaction
+       .long sys_rt_sigprocmask        /* 175 */
+       .long sys_rt_sigpending
+       .long sys_rt_sigtimedwait
+       .long sys_rt_sigqueueinfo
+       .long sys_rt_sigsuspend
+       .long sys_pread64       /* 180 */
+       .long sys_pwrite64
+       .long sys_lchown16;
+       .long sys_getcwd
+       .long sys_capget
+       .long sys_capset        /* 185 */
+       .long sys_sigaltstack
+       .long sys_sendfile
+       .long sys_ni_syscall                    /* streams1 */
+       .long sys_ni_syscall                    /* streams2 */
+       .long sys_vfork         /* 190 */
+       .long sys_getrlimit
+       .long sys_mmap2
+       .long sys_truncate64
+       .long sys_ftruncate64
+       .long sys_stat64        /* 195 */
+       .long sys_lstat64
+       .long sys_fstat64
+       .long sys_chown
+       .long sys_getuid
+       .long sys_getgid        /* 200 */
+       .long sys_geteuid
+       .long sys_getegid
+       .long sys_setreuid
+       .long sys_setregid
+       .long sys_getgroups     /* 205 */
+       .long sys_setgroups
+       .long sys_fchown
+       .long sys_setresuid
+       .long sys_getresuid
+       .long sys_setresgid     /* 210 */
+       .long sys_getresgid
+       .long sys_lchown
+       .long sys_setuid
+       .long sys_setgid
+       .long sys_setfsuid      /* 215 */
+       .long sys_setfsgid
+       .long sys_pivot_root
+       .long sys_ni_syscall
+       .long sys_ni_syscall
+       .long sys_getdents64    /* 220 */
+       .long sys_gettid
+       .long sys_tkill
+       .long sys_setxattr
+       .long sys_lsetxattr
+       .long sys_fsetxattr     /* 225 */
+       .long sys_getxattr
+       .long sys_lgetxattr
+       .long sys_fgetxattr
+       .long sys_listxattr
+       .long sys_llistxattr    /* 230 */
+       .long sys_flistxattr
+       .long sys_removexattr
+       .long sys_lremovexattr
+       .long sys_fremovexattr
+       .long sys_futex         /* 235 */
+       .long sys_sendfile64
+       .long sys_mincore
+       .long sys_madvise
+       .long sys_fcntl64
+       .long sys_readahead     /* 240 */
+       .long sys_io_setup
+       .long sys_io_destroy
+       .long sys_io_getevents
+       .long sys_io_submit
+       .long sys_io_cancel     /* 245 */
+       .long sys_fadvise64
+       .long sys_exit_group
+       .long sys_lookup_dcookie
+       .long sys_epoll_create
+       .long sys_epoll_ctl     /* 250 */
+       .long sys_epoll_wait
+       .long sys_remap_file_pages
+       .long sys_set_tid_address
+       .long sys_timer_create
+       .long sys_timer_settime /* 255 */
+       .long sys_timer_gettime
+       .long sys_timer_getoverrun
+       .long sys_timer_delete
+       .long sys_clock_settime
+       .long sys_clock_gettime /* 260 */
+       .long sys_clock_getres
+       .long sys_clock_nanosleep
+       .long sys_statfs64
+       .long sys_fstatfs64
+       .long sys_tgkill        /* 265 */
+       .long sys_utimes
+       .long sys_fadvise64_64
+       .long sys_mbind 
+       .long sys_get_mempolicy
+       .long sys_set_mempolicy /* 270 */
+       .long sys_mq_open
+       .long sys_mq_unlink
+       .long sys_mq_timedsend
+       .long sys_mq_timedreceive
+       .long sys_mq_notify     /* 275 */
+       .long sys_mq_getsetattr
+       .long sys_waitid
+       .long sys_ni_syscall                    /* for sys_vserver */
+       .long sys_add_key
+       .long sys_request_key   /* 280 */
+       .long sys_keyctl
+       .long sys_ioprio_set
+       .long sys_ioprio_get
+       .long sys_inotify_init
+       .long sys_inotify_add_watch     /* 285 */
+       .long sys_inotify_rm_watch
+       .long sys_migrate_pages
+       .long sys_openat
+       .long sys_mkdirat
+       .long sys_mknodat               /* 290 */
+       .long sys_fchownat
+       .long sys_futimesat
+       .long sys_fstatat64
+       .long sys_unlinkat
+       .long sys_renameat              /* 295 */
+       .long sys_linkat
+       .long sys_symlinkat
+       .long sys_readlinkat
+       .long sys_fchmodat
+       .long sys_faccessat             /* 300 */
+       .long sys_ni_syscall                    /* Reserved for pselect6 */
+       .long sys_ni_syscall                    /* Reserved for ppoll */
+       .long sys_unshare
+       .long sys_set_robust_list
+       .long sys_get_robust_list       /* 305 */
+       .long sys_splice
+       .long sys_sync_file_range
+       .long sys_tee
+       .long sys_vmsplice
+       .long sys_move_pages            /* 310 */
+       .long sys_sched_setaffinity
+       .long sys_sched_getaffinity
+       .long sys_kexec_load
+       .long sys_getcpu
+       .long sys_epoll_pwait           /* 315 */
+       .long sys_utimensat
+       .long sys_signalfd
+       .long sys_timerfd_create
+       .long sys_eventfd
+       .long sys_fallocate             /* 320 */
+       .long sys_timerfd_settime
+       .long sys_timerfd_gettime
+       .long sys_signalfd4
+       .long sys_eventfd2
+       .long sys_epoll_create1         /* 325 */
+       .long sys_dup3
+       .long sys_pipe2
+       .long sys_inotify_init1
+       .long sys_ni_syscall                    /* Reserved */
+       .long sys_ni_syscall            /* 330     Reserved */
+       .long sys_ni_syscall                    /* Reserved */
+       .long sys_ni_syscall                    /* Reserved */
+       .long sys_read_tp
+       .long sys_write_tp
+       .long sys_atomic_cmpxchg_32     /* 335 */
+       .long sys_atomic_barrier
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/head.S b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/head.S
new file mode 100644 (file)
index 0000000..c31aa5f
--- /dev/null
@@ -0,0 +1,700 @@
+/*
+ *  head.S is the MMU enabled ColdFire specific initial boot code
+ *
+ *  Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Matt Waddel Matt.Waddel@freescale.com
+ *  Kurt Mahan kmahan@freescale.com
+ *  Jason Jin Jason.Jin@freescale.com
+ *  Shrek Wu B16972@freescale.com
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Parts of this code came from arch/m68k/kernel/head.S
+ */
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/bootinfo.h>
+#include <asm/setup.h>
+#include <asm/entry.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/coldfire.h>
+#include <asm/cfcache.h>
+
+#define DEBUG
+
+.globl kernel_pg_dir
+.globl availmem
+.globl set_context
+.globl set_fpga
+
+#ifdef DEBUG
+/* When debugging use readable names for labels */
+#ifdef __STDC__
+#define L(name) .head.S.##name
+#else
+#define L(name) .head.S./**/name
+#endif
+#else
+#ifdef __STDC__
+#define L(name) .L##name
+#else
+#define L(name) .L/**/name
+#endif
+#endif
+
+/* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
+#ifndef __INITDATA
+#define __INITDATA     .data
+#define __FINIT                .previous
+#endif
+
+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
+/*
+ * Kernel mapped to virtual ram address.
+ *
+ * M5445x:
+ *    Data[0]: 0xF0000000 -> 0xFFFFFFFF        System regs
+ *    Data[1]: 0xA0000000 -> 0xAFFFFFFF        PCI
+ *    Code[0]: Not Mapped
+ *    Code[1]: Not Mapped
+ *
+ * M547x/M548x
+ *    Data[0]: 0xF0000000 -> 0xFFFFFFFF        System regs
+ *    Data[1]: Not Mapped
+ *    Code[0]: Not Mapped
+ *    Code[1]: Not Mapped
+ */
+#if defined(CONFIG_M5445X)
+#define ACR0_DEFAULT   #0xF00FA048   /* System regs */
+#define ACR1_DEFAULT   #0xA00FA048   /* PCI */
+#define ACR2_DEFAULT   #0x00000000   /* Not Mapped */
+#define ACR3_DEFAULT   #0x00000000   /* Not Mapped */
+#elif defined(CONFIG_M547X_8X)
+#define ACR0_DEFAULT   #0xF00FA048   /* System Regs */
+#define ACR1_DEFAULT   #0x00000000   /* Not Mapped */
+#define ACR2_DEFAULT   #0x00000000   /* Not Mapped */
+#define ACR3_DEFAULT   #0x00000000   /* Not Mapped */
+#endif
+
+#else /* CONFIG_SDRAM_BASE = PAGE_OFFSET */
+/*
+ * Kernel mapped to physical ram address.
+ *
+ * M5445x:
+ *    Data[0]: 0xF0000000 -> 0xFFFFFFFF        System regs
+ *    Data[1]: 0x40000000 -> 0x4FFFFFFF        SDRAM - uncached
+ *    Code[0]: Not Mapped
+ *    Code[1]: 0x40000000 -> 0x4FFFFFFF        SDRAM - cached
+ *
+ * M547x/M548x
+ *    Data[0]: 0xF0000000 -> 0xFFFFFFFF        System regs
+ *    Data[1]: 0x00000000 -> 0x0FFFFFFF        SDRAM - uncached
+ *    Code[0]: Not Mapped
+ *    Code[1]: 0x00000000 -> 0x0FFFFFFF        SDRAM - cached
+ */
+#if defined(CONFIG_M5445X)
+#define ACR0_DEFAULT   #0xF00FA048   /* System Regs uncached/precise */
+#define ACR1_DEFAULT   #0x400FA028   /* SDRAM cached/copyback */
+#define ACR2_DEFAULT   #0x00000000   /* Not mapped */
+#define ACR3_DEFAULT   #0x400FA028   /* SDRAM cached/copyback */
+#elif defined(CONFIG_M547X_8X)
+#define ACR0_DEFAULT   #0xF00FA048   /* System Regs */
+#define ACR1_DEFAULT   #0x000FA028   /* SDRAM cached/copy-back */
+#define ACR2_DEFAULT   #0x00000000   /* Not mapped */
+#define ACR3_DEFAULT   #0x000FA028   /* Instruction cached/copy-back */
+#endif
+#endif
+
+/* ACR mapping for FPGA (maps 0) */
+#define ACR0_FPGA       #0x000FA048   /* ACR0 enable FPGA */
+
+/* Several macros to make the writing of subroutines easier:
+ * - func_start marks the beginning of the routine which setups the frame
+ *   register and saves the registers, it also defines another macro
+ *   to automatically restore the registers again.
+ * - func_return marks the end of the routine and simply calls the prepared
+ *   macro to restore registers and jump back to the caller.
+ * - func_define generates another macro to automatically put arguments
+ *   onto the stack call the subroutine and cleanup the stack again.
+ */
+
+.macro load_symbol_address     symbol,register
+       movel   #\symbol,\register
+.endm
+       
+.macro func_start      name,saveregs,savesize,stack=0
+L(\name):
+       linkw   %a6,#-\stack
+       subal   #(\savesize),%sp
+       moveml  \saveregs,%sp@
+.set   stackstart,-\stack
+
+.macro func_return_\name
+       moveml  %sp@,\saveregs
+       addal   #(\savesize),%sp
+       unlk    %a6
+       rts
+.endm
+.endm
+
+.macro func_return     name
+       func_return_\name
+.endm
+
+.macro func_call       name
+       jbsr    L(\name)
+.endm
+
+.macro move_stack      nr,arg1,arg2,arg3,arg4
+.if    \nr
+       move_stack      "(\nr-1)",\arg2,\arg3,\arg4
+       movel   \arg1,%sp@-
+.endif
+.endm
+
+.macro func_define     name,nr=0
+.macro \name   arg1,arg2,arg3,arg4
+       move_stack      \nr,\arg1,\arg2,\arg3,\arg4
+       func_call       \name
+.if    \nr
+       lea     %sp@(\nr*4),%sp
+.endif
+.endm
+.endm
+
+func_define    serial_putc,1
+
+.macro putc    ch
+       pea     \ch
+       func_call       serial_putc
+       addql   #4,%sp
+.endm
+
+.macro dputc   ch
+#ifdef DEBUG
+       putc    \ch
+#endif
+.endm
+
+func_define    putn,1
+
+.macro dputn   nr
+#ifdef DEBUG
+       putn    \nr
+#endif
+.endm
+
+/*
+       mmu_map  -  creates a new TLB entry
+
+       virt_addr      Must be on proper boundary
+       phys_addr      Must be on proper boundary
+       itlb           MMUOR_ITLB if instruction TLB or 0
+       asid           address space ID
+       shared_global  MMUTR_SG if shared between different ASIDs or 0
+       size_code      MMUDR_SZ1M  1 MB
+                      MMUDR_SZ4K  4 KB
+                      MMUDR_SZ8K  8 KB
+                      MMUDR_SZ16M 16 MB
+       cache_mode     MMUDR_INC   instruction non-cacheable
+                       MMUDR_IC    instruction cacheable
+                       MMUDR_DWT   data writethrough
+                      MMUDR_DCB   data copyback
+                      MMUDR_DNCP  data non-cacheable, precise
+                      MMUDR_DNCIP data non-cacheable, imprecise
+       super_prot     MMUDR_SP if user mode generates exception or 0
+       readable       MMUDR_R if permits read access (data TLB) or 0
+       writable       MMUDR_W if permits write access (data TLB) or 0
+       executable     MMUDR_X if permits execute access (instruction TLB) or 0
+       locked         MMUDR_LK prevents TLB entry from being replaced or 0
+       temp_data_reg  a data register to use for temporary values
+*/
+.macro mmu_map virt_addr,phys_addr,itlb,asid,shared_global,size_code,cache_mode,super_prot,readable,writable,executable,locked,temp_data_reg
+       /* Set up search of TLB. */
+       movel   #(\virt_addr+1), \temp_data_reg
+       movel   \temp_data_reg, MMUAR
+       /* Search.  */
+       movel   #(MMUOR_STLB + MMUOR_ADR +\itlb), \temp_data_reg
+       movew   \temp_data_reg, (MMUOR)
+       /* Set up tag value.  */
+       movel   #(\virt_addr + \asid + \shared_global + MMUTR_V), \temp_data_reg
+       movel   \temp_data_reg, MMUTR
+       /* Set up data value.  */
+       movel   #(\phys_addr + \size_code + \cache_mode + \super_prot + \readable + \writable + \executable + \locked), \temp_data_reg
+       movel   \temp_data_reg, MMUDR
+       /* Save it.  */
+       movel   #(MMUOR_ACC + MMUOR_UAA + \itlb), \temp_data_reg
+       movew   \temp_data_reg, (MMUOR)
+.endm  /* mmu_map */
+
+.macro mmu_unmap       virt_addr,itlb,temp_data_reg
+       /* Set up search of TLB. */
+       movel   #(\virt_addr+1), \temp_data_reg
+       movel   \temp_data_reg, MMUAR
+       /* Search.  */
+       movel   #(MMUOR_STLB + MMUOR_ADR +\itlb), \temp_data_reg
+       movew   \temp_data_reg, (MMUOR)
+       /* Test for hit.  */
+       movel   MMUSR,\temp_data_reg
+       btst    #MMUSR_HITN,\temp_data_reg
+       beq     1f
+       /* Read the TLB.  */
+       movel   #(MMUOR_RW + MMUOR_ACC +\itlb), \temp_data_reg
+       movew   \temp_data_reg, (MMUOR)
+       movel   MMUSR,\temp_data_reg
+       /* Set up tag value.  */
+       movel   #0, \temp_data_reg
+       movel   \temp_data_reg, MMUTR
+       /* Set up data value.  */
+       movel   #0, \temp_data_reg
+       movel   \temp_data_reg, MMUDR
+       /* Save it.  */
+       movel   #(MMUOR_ACC + MMUOR_UAA + \itlb), \temp_data_reg
+       movew   \temp_data_reg, (MMUOR)
+1:     
+.endm  /* mmu_unmap */
+
+/* .text */
+.section ".text.head","ax"
+ENTRY(_stext)
+/* Version numbers of the bootinfo interface -- if we later pass info
+ * from boot ROM we might want to put something real here.
+ *
+ * The area from _stext to _start will later be used as kernel pointer table
+ */
+       bras    1f      /* Jump over bootinfo version numbers */
+
+       .long   BOOTINFOV_MAGIC
+       .long   0
+1:     jmp     __start
+
+.equ   kernel_pg_dir,_stext
+.equ   .,_stext+0x1000
+
+ENTRY(_start)
+       jra     __start
+__INIT
+ENTRY(__start)
+/* Save the location of u-boot info - cmd line, bd_info, etc. */
+       movel   %a7,%a4         /* Don't use %a4 before cf_early_init */
+       addl    #0x00000004,%a4 /* offset past top */
+       addl    #(PAGE_OFFSET-CONFIG_SDRAM_BASE),%a4    /* high mem offset */
+
+/* Setup initial stack pointer */
+       movel   #CONFIG_SDRAM_BASE+0x1000,%sp
+
+/* Setup usp */
+       subl    %a0,%a0
+       movel   %a0,%usp
+
+#if defined(CONFIG_M5445X)
+#if defined(CONFIG_SRAM)
+       movel   #(CONFIG_SRAM_BASE+0x221), %d0
+#else
+       movel   #0x80000000, %d0
+#endif
+       movec   %d0, %rambar1
+#elif defined(CONFIG_M547X_8X)
+       movel   #MCF_MBAR, %d0
+       movec   %d0, %mbar
+       move.l  #(MCF_RAMBAR0 + 0x21), %d0
+       movec   %d0, %rambar0
+       move.l  #(MCF_RAMBAR1 + 0x21), %d0
+       movec   %d0, %rambar1
+#endif
+
+       movew   #0x2700,%sr
+
+/* reset cache */
+       movel   #(CF_CACR_ICINVA + CF_CACR_DCINVA),%d0
+       movecl  %d0,%cacr
+
+       movel   #(MMU_BASE+1),%d0
+       movecl  %d0,%mmubar
+       movel   #MMUOR_CA,%a0                   /* Clear tlb entries */
+       movew   %a0,(MMUOR)
+       movel   #(MMUOR_CA + MMUOR_ITLB),%a0    /* Use ITLB for searches */
+       movew   %a0,(MMUOR)
+       movel   #0,%a0                          /* Clear Addr Space User ID */
+       movecl  %a0,%asid 
+
+/* setup ACRs */
+       movel   ACR0_DEFAULT, %d0               /* ACR0 (DATA) setup */
+       movec   %d0, %acr0
+       nop
+       movel   ACR1_DEFAULT, %d0               /* ACR1 (DATA) setup */
+       movec   %d0, %acr1
+       nop
+       movel   ACR2_DEFAULT, %d0               /* ACR2 (CODE) setup */
+       movec   %d0, %acr2
+       nop
+       movel   ACR3_DEFAULT, %d0               /* ACR3 (CODE) setup */
+       movec   %d0, %acr3
+       nop
+
+       /* If you change the memory size to another value make a matching 
+          change in paging_init(cf-mmu.c) to zones_size[]. */
+
+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
+#if defined(CONFIG_M5445X)
+       /* Map 256MB as code */
+       mmu_map (PAGE_OFFSET+0*0x1000000),  (PHYS_OFFSET+0*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+1*0x1000000),  (PHYS_OFFSET+1*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+2*0x1000000),  (PHYS_OFFSET+2*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+3*0x1000000),  (PHYS_OFFSET+3*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+4*0x1000000),  (PHYS_OFFSET+4*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+5*0x1000000),  (PHYS_OFFSET+5*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+6*0x1000000),  (PHYS_OFFSET+6*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+7*0x1000000),  (PHYS_OFFSET+7*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+8*0x1000000),  (PHYS_OFFSET+8*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+9*0x1000000),  (PHYS_OFFSET+9*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+10*0x1000000), (PHYS_OFFSET+10*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+11*0x1000000), (PHYS_OFFSET+11*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+12*0x1000000), (PHYS_OFFSET+12*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+13*0x1000000), (PHYS_OFFSET+13*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+14*0x1000000), (PHYS_OFFSET+14*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+15*0x1000000), (PHYS_OFFSET+15*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC,  MMUDR_SP, \
+               0, 0, MMUDR_X, MMUDR_LK, %d0
+
+       /* Map 256MB as data also */
+       mmu_map (PAGE_OFFSET+0*0x1000000),  (PHYS_OFFSET+0*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+1*0x1000000),  (PHYS_OFFSET+1*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+2*0x1000000),  (PHYS_OFFSET+2*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+3*0x1000000),  (PHYS_OFFSET+3*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+4*0x1000000),  (PHYS_OFFSET+4*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+5*0x1000000),  (PHYS_OFFSET+5*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+6*0x1000000),  (PHYS_OFFSET+6*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+7*0x1000000),  (PHYS_OFFSET+7*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+8*0x1000000),  (PHYS_OFFSET+8*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+9*0x1000000),  (PHYS_OFFSET+9*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+10*0x1000000), (PHYS_OFFSET+10*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+11*0x1000000), (PHYS_OFFSET+11*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+12*0x1000000), (PHYS_OFFSET+12*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+13*0x1000000), (PHYS_OFFSET+13*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+14*0x1000000), (PHYS_OFFSET+14*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+15*0x1000000), (PHYS_OFFSET+15*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+
+       /* Map ATA registers -- sacrifice a data TLB due to the hw design */
+       mmu_map (0x90000000), (0x90000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+
+#elif defined(CONFIG_M547X_8X)
+
+       /* Map first 8 MB as code */
+       mmu_map (PAGE_OFFSET+0*1024*1024),  (0*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, MMUDR_X, \
+               MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+1*1024*1024),  (1*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, MMUDR_X, \
+               MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+2*1024*1024),  (2*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, MMUDR_X, \
+               MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+3*1024*1024),  (3*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, MMUDR_X, \
+               MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+4*1024*1024),  (4*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, MMUDR_X, \
+               MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+5*1024*1024),  (5*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, MMUDR_X, \
+               MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+6*1024*1024),  (6*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, MMUDR_X, \
+               MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+7*1024*1024),  (7*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, MMUDR_X, \
+               MMUDR_LK, %d0
+
+       /* Map first 8 MB as data */
+       mmu_map (PAGE_OFFSET+0*1024*1024),  (0*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+1*1024*1024),  (1*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+2*1024*1024),  (2*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+3*1024*1024),  (3*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+4*1024*1024),  (4*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+5*1024*1024),  (5*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+6*1024*1024),  (6*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, MMUDR_LK, %d0
+       mmu_map (PAGE_OFFSET+7*1024*1024),  (7*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, MMUDR_LK, %d0
+#endif
+       /*
+        * Do unity mapping to enable the MMU.  Map first chunk of memory
+        * in place as code/data.  The TLBs will be deleted after the MMU is
+        * enabled and we are executing in high memory.
+        */
+
+#if defined(CONFIG_M5445X)
+       /* Map first 16 MB as code */
+       mmu_map (PHYS_OFFSET+0*0x1000000), (PHYS_OFFSET+0*0x1000000), \
+               MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_INC,  MMUDR_SP, 0, \
+               0, MMUDR_X, 0, %d0
+       /* Map first 16 MB as data too  */
+       mmu_map (PHYS_OFFSET+0*0x1000000), (PHYS_OFFSET+0*0x1000000), 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, 0, %d0
+#elif defined(CONFIG_M547X_8X)
+       /* Map first 4 MB as code */
+       mmu_map (0*1024*1024), (0*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, \
+               MMUDR_X, 0, %d0
+       mmu_map (1*1024*1024), (1*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, \
+               MMUDR_X, 0, %d0
+       mmu_map (2*1024*1024), (2*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, \
+               MMUDR_X, 0, %d0
+       mmu_map (3*1024*1024), (3*1024*1024), MMUOR_ITLB, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_IC,  MMUDR_SP, 0, 0, \
+               MMUDR_X, 0, %d0
+
+       /* Map first 4 MB as data too */
+       mmu_map (0*1024*1024), (0*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DCB, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, 0, %d0
+       mmu_map (1*1024*1024), (1*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DCB, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, 0, %d0
+       mmu_map (2*1024*1024), (2*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DCB, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, 0, %d0
+       mmu_map (3*1024*1024), (3*1024*1024), 0, 0, \
+               MMUTR_SG, MMUDR_SZ1M, MMUDR_DCB, MMUDR_SP, MMUDR_R, \
+               MMUDR_W, 0, 0, %d0
+#endif
+#endif /* CONFIG_SDRAM_BASE != PAGE_OFFSET */
+
+       /* Turn on MMU */
+       movel   #(MMUCR_EN),%a0
+       movel   %a0,MMUCR
+       nop     /* This synchs the pipeline after a write to MMUCR */
+
+       movel   #__running_high,%a0  /* Get around PC-relative addressing. */
+       jmp     %a0@
+
+ENTRY(__running_high)
+       load_symbol_address _stext,%sp
+       movel   L(memory_start),%a0
+       movel   %a0,availmem
+       load_symbol_address L(phys_kernel_start),%a0
+       load_symbol_address _stext,%a1
+       subl    #_stext,%a1
+       addl    #PAGE_OFFSET,%a1
+       movel   %a1,%a0@
+
+/* zero bss */
+       lea     _sbss,%a0
+       lea     _ebss,%a1
+       clrl    %d0
+_loop_bss:
+       movel   %d0,(%a0)+
+       cmpl    %a0,%a1
+       bne     _loop_bss
+
+       /* Unmap unity mappings */
+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
+#if defined(CONFIG_M5445X)
+       mmu_unmap (PHYS_OFFSET+0*0x1000000), MMUOR_ITLB, %d0
+       mmu_unmap (PHYS_OFFSET+0*0x1000000), 0, %d0
+#elif defined(CONFIG_M547X_8X)
+       mmu_unmap (PHYS_OFFSET+0*0x1000000), MMUOR_ITLB, %d0
+       mmu_unmap (PHYS_OFFSET+1*0x1000000), MMUOR_ITLB, %d0
+       mmu_unmap (PHYS_OFFSET+2*0x1000000), MMUOR_ITLB, %d0
+       mmu_unmap (PHYS_OFFSET+3*0x1000000), MMUOR_ITLB, %d0
+       mmu_unmap (PHYS_OFFSET+0*0x1000000), 0, %d0
+       mmu_unmap (PHYS_OFFSET+1*0x1000000), 0, %d0
+       mmu_unmap (PHYS_OFFSET+2*0x1000000), 0, %d0
+       mmu_unmap (PHYS_OFFSET+3*0x1000000), 0, %d0
+#endif
+#endif /* CONFIG_SDRAM_BASE != PAGE_OFFSET */
+
+/* create dma memory mirror TLB mapping */
+#if defined(CONFIG_M5445X)
+       mmu_map CONFIG_DMA_BASE, \
+               CONFIG_SDRAM_BASE, 0, 0, \
+               MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
+               0, MMUDR_LK, %d0
+#elif defined(CONFIG_M547X_8X)
+        mmu_map (CONFIG_DMA_BASE + 0*1024*1024), \
+                (CONFIG_SDRAM_BASE + 0*1024*1024), 0, 0, \
+                MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+                MMUDR_W, 0, MMUDR_LK, %d0
+        mmu_map (CONFIG_DMA_BASE + 1*1024*1024), \
+                (CONFIG_SDRAM_BASE + 1*1024*1024), 0, 0, \
+                MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+                MMUDR_W, 0, MMUDR_LK, %d0
+        mmu_map (CONFIG_DMA_BASE + 2*1024*1024), \
+                (CONFIG_SDRAM_BASE + 2*1024*1024), 0, 0, \
+                MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+                MMUDR_W, 0, MMUDR_LK, %d0
+        mmu_map (CONFIG_DMA_BASE + 3*1024*1024), \
+                (CONFIG_SDRAM_BASE + 3*1024*1024), 0, 0, \
+                MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+                MMUDR_W, 0, MMUDR_LK, %d0
+        mmu_map (CONFIG_DMA_BASE + 4*1024*1024), \
+                (CONFIG_SDRAM_BASE + 4*1024*1024), 0, 0, \
+                MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+                MMUDR_W, 0, MMUDR_LK, %d0
+        mmu_map (CONFIG_DMA_BASE + 5*1024*1024), \
+                (CONFIG_SDRAM_BASE + 5*1024*1024), 0, 0, \
+                MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+                MMUDR_W, 0, MMUDR_LK, %d0
+        mmu_map (CONFIG_DMA_BASE + 6*1024*1024), \
+                (CONFIG_SDRAM_BASE + 6*1024*1024), 0, 0, \
+                MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+                MMUDR_W, 0, MMUDR_LK, %d0
+        mmu_map (CONFIG_DMA_BASE + 7*1024*1024), \
+                (CONFIG_SDRAM_BASE + 7*1024*1024), 0, 0, \
+                MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
+                MMUDR_W, 0, MMUDR_LK, %d0
+#endif
+
+/* Setup initial stack pointer */
+       lea     init_task,%a2 
+       lea     init_thread_union+THREAD_SIZE,%sp
+       subl    %a6,%a6         /* clear a6 for gdb */
+
+#ifdef CONFIG_MCF_USER_HALT
+/* Setup debug control reg to allow halts from user space */
+       lea     wdbg_uhe,%a0
+       wdebug  (%a0)
+#endif
+
+       movel   %a4,uboot_info_stk /* save uboot info to variable */
+       jsr     cf_early_init
+       jmp     start_kernel
+
+.section ".text.head","ax"
+set_context:
+func_start     set_context,%d0,(1*4)
+       movel   12(%sp),%d0
+       movec   %d0,%asid
+func_return    set_context
+
+#ifdef CONFIG_M5445X
+/*
+ * set_fpga(addr,val) on the M5445X
+ *
+ * Map in 0x00000000 -> 0x0fffffff and then do the write.
+ */
+set_fpga:
+       movew   %sr,%d1
+       movew   #0x2700,%sr
+       movel   ACR0_FPGA, %d0
+       movec   %d0, %acr0
+       nop
+       moveal  4(%sp),%a0
+       movel   8(%sp),%a0@
+       movel   ACR0_DEFAULT, %d0
+       movec   %d0, %acr0
+       nop
+       movew   %d1,%sr
+       rts
+#endif
+
+       .data
+       .align  4
+
+availmem:
+       .long   0
+L(phys_kernel_start):
+       .long   PAGE_OFFSET
+L(kernel_end):
+       .long   0
+L(memory_start):
+       .long   PAGE_OFFSET_RAW
+
+#ifdef CONFIG_MCF_USER_HALT
+/*
+ * Enable User Halt Enable in the debug control register.
+ */
+wdbg_uhe:
+       .word   0x2c80  /* DR0 */
+       .word   0x00b0  /* 31:16 */
+       .word   0x0400  /* 15:0 -- enable UHE */
+       .word   0x0000  /* unused */
+#endif
+
+
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/ints.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/ints.c
new file mode 100644 (file)
index 0000000..daecbd6
--- /dev/null
@@ -0,0 +1,467 @@
+/*
+ * linux/arch/m68k/coldfire/ints.c -- General interrupt handling code
+ *
+ *  Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Matt Waddel Matt.Waddel@freescale.com
+ *  Kurt Mahan kmahan@freescale.com
+ *  Jason Jin Jason.Jin@freescale.com
+ *  Shrek Wu B16972@freescale.com
+ *
+ * Based on:
+ * linux/arch/m68k/kernel/ints.c &
+ * linux/arch/m68knommu/5307/ints.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <linux/errno.h>
+#include <linux/seq_file.h>
+#include <linux/interrupt.h>
+
+#include <asm/system.h>
+#include <asm/irq.h>
+#include <asm/traps.h>
+#include <asm/page.h>
+#include <asm/machdep.h>
+#include <asm/irq_regs.h>
+
+#include <asm/mcfsim.h>
+
+/*
+ * IRQ Handler lists.
+ */
+static struct irq_node *irq_list[SYS_IRQS];
+static struct irq_controller *irq_controller[SYS_IRQS];
+static int irq_depth[SYS_IRQS];
+
+/*
+ * IRQ Controller
+ */
+#if defined(CONFIG_M5445X)
+void m5445x_irq_enable(unsigned int irq);
+void m5445x_irq_disable(unsigned int irq);
+static struct irq_controller m5445x_irq_controller = {
+       .name           = "M5445X",
+       .lock           = SPIN_LOCK_UNLOCKED,
+       .enable         = m5445x_irq_enable,
+       .disable        = m5445x_irq_disable,
+};
+#elif defined(CONFIG_M547X_8X)
+void m547x_8x_irq_enable(unsigned int irq);
+void m547x_8x_irq_disable(unsigned int irq);
+static struct irq_controller m547x_8x_irq_controller = {
+       .name           = "M547X_8X",
+       .lock           = SPIN_LOCK_UNLOCKED,
+       .enable         = m547x_8x_irq_enable,
+       .disable        = m547x_8x_irq_disable,
+};
+#else
+# error No IRQ controller defined
+#endif
+
+#define        POOL_SIZE       SYS_IRQS
+static struct irq_node  pool[POOL_SIZE];
+static struct irq_node *get_irq_node(void);
+
+/* The number of spurious interrupts */
+unsigned int num_spurious;
+asmlinkage void handle_badint(struct pt_regs *regs);
+
+/*
+ * void init_IRQ(void)
+ *
+ * This function should be called during kernel startup to initialize
+ * the IRQ handling routines.
+ */
+void __init init_IRQ(void)
+{
+       int i;
+
+#if defined(CONFIG_M5445X)
+       for (i = 0; i < SYS_IRQS; i++)
+               irq_controller[i] = &m5445x_irq_controller;
+#elif defined(CONFIG_M547X_8X)
+       for (i = 0; i < SYS_IRQS; i++)
+               irq_controller[i] = &m547x_8x_irq_controller;
+#endif
+}
+
+/*
+ * process_int(unsigned long vec, struct pt_regs *fp)
+ *
+ * Process an interrupt.  Called from entry.S.
+ */
+asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
+{
+       struct pt_regs *old_regs;
+       struct irq_node *node;
+       old_regs = set_irq_regs(fp);
+       kstat_cpu(0).irqs[vec]++;
+
+       node = irq_list[vec];
+       if (!node)
+               handle_badint(fp);
+       else {
+               do {
+                       node->handler(vec, node->dev_id);
+                       node = node->next;
+               } while (node);
+       }
+
+       set_irq_regs(old_regs);
+}
+
+/*
+ * show_interrupts( struct seq_file *p, void *v)
+ *
+ * Called to show all the current interrupt information.
+ */
+int show_interrupts(struct seq_file *p, void *v)
+{
+       struct irq_controller *contr;
+       struct irq_node *node;
+       int i = *(loff_t *) v;
+
+       if ((i < NR_IRQS) && (irq_list[i])) {
+               contr = irq_controller[i];
+               node = irq_list[i];
+               seq_printf(p, "%-8s %3u: %10u %s", contr->name, i,
+                       kstat_cpu(0).irqs[i], node->devname);
+               while ((node = node->next))
+                       seq_printf(p, ", %s", node->devname);
+
+               seq_printf(p, "\n");
+       }
+
+       return 0;
+}
+
+/*
+ * get_irq_node(void)
+ *
+ * Get an irq node from the pool.
+ */
+struct irq_node *get_irq_node(void)
+{
+       struct irq_node *p = pool;
+       int i;
+
+       for (i = 0; i < POOL_SIZE; i++, p++) {
+               if (!p->handler) {
+                       memset(p, 0, sizeof(struct irq_node));
+                       return p;
+               }
+       }
+       printk(KERN_INFO "%s(%s:%d): No more irq nodes, I suggest you \
+               increase POOL_SIZE", __FUNCTION__, __FILE__, __LINE__);
+       return NULL;
+}
+
+void init_irq_proc(void)
+{
+       /* Insert /proc/irq driver here */
+}
+
+int setup_irq(unsigned int irq, struct irq_node *node)
+{
+       struct irq_controller *contr;
+       struct irq_node **prev;
+       unsigned long flags;
+
+       if (irq >= NR_IRQS || !irq_controller[irq]) {
+               printk("%s: Incorrect IRQ %d from %s\n",
+                      __FUNCTION__, irq, node->devname);
+               return -ENXIO;
+       }
+
+       contr = irq_controller[irq];
+       spin_lock_irqsave(&contr->lock, flags);
+
+       prev = irq_list + irq;
+       if (*prev) {
+               /* Can't share interrupts unless both agree to */
+               if (!((*prev)->flags & node->flags & IRQF_SHARED)) {
+                       spin_unlock_irqrestore(&contr->lock, flags);
+                       printk(KERN_INFO "%s: -BUSY-Incorrect IRQ %d \n",
+                               __FUNCTION__, irq);
+                       return -EBUSY;
+               }
+               while (*prev)
+                       prev = &(*prev)->next;
+       }
+
+       if (!irq_list[irq]) {
+               if (contr->startup)
+                       contr->startup(irq);
+               else
+                       contr->enable(irq);
+       }
+       node->next = NULL;
+       *prev = node;
+
+       spin_unlock_irqrestore(&contr->lock, flags);
+
+       return 0;
+}
+
+int request_irq(unsigned int irq,
+               irq_handler_t handler,
+               unsigned long flags, const char *devname, void *dev_id)
+{
+       struct irq_node *node = get_irq_node();
+       int res;
+
+       if (!node) {
+               printk(KERN_INFO "%s:get_irq_node error %x\n",
+                       __FUNCTION__,(unsigned int) node);
+               return -ENOMEM;
+       }
+       node->handler = handler;
+       node->flags   = flags;
+       node->dev_id  = dev_id;
+       node->devname = devname;
+
+       res = setup_irq(irq, node);
+       if (res)
+               node->handler = NULL;
+
+       return res;
+}
+EXPORT_SYMBOL(request_irq);
+
+void free_irq(unsigned int irq, void *dev_id)
+{
+       struct irq_controller *contr;
+       struct irq_node **p, *node;
+       unsigned long flags;
+
+       if (irq >= NR_IRQS || !irq_controller[irq]) {
+               printk(KERN_DEBUG "%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
+               return;
+       }
+
+       contr = irq_controller[irq];
+       spin_lock_irqsave(&contr->lock, flags);
+
+       p = irq_list + irq;
+       while ((node = *p)) {
+               if (node->dev_id == dev_id)
+                       break;
+               p = &node->next;
+       }
+
+       if (node) {
+               *p = node->next;
+               node->handler = NULL;
+       } else
+               printk(KERN_DEBUG "%s: Removing probably wrong IRQ %d\n",
+                      __FUNCTION__, irq);
+
+       if (!irq_list[irq]) {
+               if (contr->shutdown)
+                       contr->shutdown(irq);
+               else
+                       contr->disable(irq);
+       }
+
+       spin_unlock_irqrestore(&contr->lock, flags);
+}
+EXPORT_SYMBOL(free_irq);
+
+void enable_irq(unsigned int irq)
+{
+       struct irq_controller *contr;
+       unsigned long flags;
+
+       if (irq >= NR_IRQS || !irq_controller[irq]) {
+               printk(KERN_DEBUG "%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
+               return;
+       }
+
+       contr = irq_controller[irq];
+       spin_lock_irqsave(&contr->lock, flags);
+       if (irq_depth[irq]) {
+               if (!--irq_depth[irq]) {
+                       if (contr->enable)
+                               contr->enable(irq);
+               }
+       } else
+               WARN_ON(1);
+       spin_unlock_irqrestore(&contr->lock, flags);
+}
+EXPORT_SYMBOL(enable_irq);
+
+void disable_irq(unsigned int irq)
+{
+       struct irq_controller *contr;
+       unsigned long flags;
+
+       if (irq >= NR_IRQS || !irq_controller[irq]) {
+               printk(KERN_DEBUG "%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
+               return;
+       }
+
+       contr = irq_controller[irq];
+       spin_lock_irqsave(&contr->lock, flags);
+       if (!irq_depth[irq]++) {
+               if (contr->disable)
+                       contr->disable(irq);
+       }
+       spin_unlock_irqrestore(&contr->lock, flags);
+}
+EXPORT_SYMBOL(disable_irq);
+
+void disable_irq_nosync(unsigned int irq) __attribute__((alias("disable_irq")));
+EXPORT_SYMBOL(disable_irq_nosync);
+
+
+unsigned long probe_irq_on(void)
+{
+       return 0;
+}
+EXPORT_SYMBOL(probe_irq_on);
+
+int probe_irq_off(unsigned long irqs)
+{
+       return 0;
+}
+EXPORT_SYMBOL(probe_irq_off);
+
+asmlinkage void handle_badint(struct pt_regs *regs)
+{
+       kstat_cpu(0).irqs[0]++;
+       num_spurious++;
+       printk(KERN_DEBUG "unexpected interrupt from %u\n", regs->vector);
+}
+EXPORT_SYMBOL(handle_badint);
+
+unsigned int irq_canonicalize(unsigned int irq)
+{                       
+#ifdef CONFIG_Q40
+        if (MACH_IS_Q40 && irq == 11)
+                irq = 10;
+#endif
+        return irq;
+}
+
+EXPORT_SYMBOL(irq_canonicalize);
+
+#ifdef CONFIG_M5445X
+/*
+ * M5445X Implementation
+ */
+void m5445x_irq_enable(unsigned int irq)
+{
+       /* enable the interrupt hardware */
+       if (irq < 64)
+               return;
+
+       /* adjust past non-hardware ints */
+       irq -= 64;
+
+       /* check for eport */
+       if ((irq > 0) && (irq < 8)) {
+               /* enable eport */
+               MCF_EPORT_EPPAR &= ~(3 << (irq*2));     /* level */
+               MCF_EPORT_EPDDR &= ~(1 << irq);         /* input */
+               MCF_EPORT_EPIER |= 1 << irq;            /* irq enabled */
+       }
+
+       if (irq < 64) {
+               /* controller 0 */
+               MCF_INTC0_ICR(irq) = 0x02;
+               MCF_INTC0_CIMR = irq;
+       } else {
+               /* controller 1 */
+               irq -= 64;
+               MCF_INTC1_ICR(irq) = 0x02;
+               MCF_INTC1_CIMR = irq;
+       }
+}
+
+void m5445x_irq_disable(unsigned int irq)
+{
+       /* disable the interrupt hardware */
+       if (irq < 64)
+               return;
+
+       /* adjust past non-hardware ints */
+       irq -= 64;
+
+       /* check for eport */
+       if ((irq > 0) && (irq < 8)) {
+               /* disable eport */
+               MCF_EPORT_EPIER &= ~(1 << irq);
+       }
+
+       if (irq < 64) {
+               /* controller 0 */
+               MCF_INTC0_ICR(irq) = 0x00;
+               MCF_INTC0_SIMR = irq;
+       } else {
+               /* controller 1 */
+               irq -= 64;
+               MCF_INTC1_ICR(irq) = 0x00;
+               MCF_INTC1_SIMR = irq;
+       }
+}
+#elif defined(CONFIG_M547X_8X)
+/*
+ * M547X_8X Implementation
+ */
+void m547x_8x_irq_enable(unsigned int irq)
+{
+       /* enable the interrupt hardware */
+       if (irq < 64)
+               return;
+
+       /* adjust past non-hardware ints */
+       irq -= 64;
+
+       /* check for eport */
+       if ((irq > 0) && (irq < 8)) {
+               /* enable eport */
+               MCF_EPPAR &= ~(3 << (irq*2));
+               /* level */
+               MCF_EPDDR &= ~(1 << irq);
+               /* input */
+               MCF_EPIER |= 1 << irq;
+               /* irq enabled */
+       }
+
+       if (irq < 32) {
+               /* *grumble* don't set low bit of IMRL */
+               MCF_IMRL &= (~(1 << irq) & 0xfffffffe);
+       } else {
+               MCF_IMRH &= ~(1 << (irq - 32));
+       }
+}
+
+void m547x_8x_irq_disable(unsigned int irq)
+{
+       /* disable the interrupt hardware */
+       if (irq < 64)
+               return;
+
+       /* adjust past non-hardware ints */
+       irq -= 64;
+
+       /* check for eport */
+       if ((irq > 0) && (irq < 8)) {
+               /* disable eport */
+               MCF_EPIER &= ~(1 << irq);
+       }
+
+       if (irq < 32)
+               MCF_IMRL |= (1 << irq);
+       else
+               MCF_IMRH |= (1 << (irq - 32));
+}
+#endif
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/muldi3.S b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/muldi3.S
new file mode 100644 (file)
index 0000000..c4f216e
--- /dev/null
@@ -0,0 +1,67 @@
+/*
+ * Coldfire muldi3 assembly verion
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *   Jason Jin Jason.Jin@freescale.com
+ *   Shrek Wu B16972@freescale.com
+ */
+#include <linux/linkage.h>
+.globl __muldi3
+
+ENTRY(__muldi3)
+       linkw   %fp,#0
+       lea     %sp@(-32),%sp
+       moveml  %d2-%d7/%a2-%a3,%sp@
+       moveal  %fp@(8), %a2
+       moveal  %fp@(12), %a3
+       moveal  %fp@(16), %a0
+       moveal  %fp@(20),%a1
+       movel   %a3,%d2
+       andil   #65535,%d2
+       movel   %a3,%d3
+       clrw    %d3
+       swap    %d3
+       movel   %a1,%d0
+       andil   #65535,%d0
+       movel   %a1,%d1
+       clrw    %d1
+       swap    %d1
+       movel   %d2,%d7
+       mulsl   %d0,%d7
+       movel   %d2,%d4
+       mulsl   %d1,%d4
+       movel   %d3,%d2
+       mulsl   %d0,%d2
+       mulsl   %d1,%d3
+       movel   %d7,%d0
+       clrw    %d0
+       swap    %d0
+       addl    %d0,%d4
+       addl    %d2,%d4
+       cmpl    %d4,%d2
+       blss    1f
+       addil   #65536,%d3
+1:
+       movel   %d4,%d0
+       clrw    %d0
+       swap    %d0
+       movel   %d3,%d5
+       addl    %d0,%d5
+       movew   %d4,%d6
+       swap    %d6
+       movew   %d7,%d6
+       movel   %d5,%d0
+       movel   %d6,%d1
+       movel   %a3,%d2
+       movel   %a0,%d3
+       mulsl   %d3,%d2
+       movel   %a2,%d3
+       movel   %a1,%d4
+       mulsl   %d4,%d3
+       addl    %d3,%d2
+       movel   %d2,%d0
+       addl    %d5,%d0
+       moveml  %sp@, %d2-%d7/%a2-%a3
+       lea     %sp@(32),%sp
+       unlk    %fp
+       rts
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/signal.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/signal.c
new file mode 100644 (file)
index 0000000..4371914
--- /dev/null
@@ -0,0 +1,991 @@
+/*
+ *  linux/arch/m68k/kernel/signal.c
+ *
+ *  Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Matt Waddel Matt.Waddel@freescale.com
+ *  Jason Jin Jason.Jin@freescale.com
+ *  Shrek Wu B16972@freescale.com
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Derived from m68k/kernel/signal.c and the original authors are credited
+ * there.
+ */
+
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/syscalls.h>
+#include <linux/errno.h>
+#include <linux/wait.h>
+#include <linux/ptrace.h>
+#include <linux/unistd.h>
+#include <linux/stddef.h>
+#include <linux/highuid.h>
+#include <linux/personality.h>
+#include <linux/tty.h>
+#include <linux/binfmts.h>
+
+#include <asm/setup.h>
+#include <asm/cf_uaccess.h>
+#include <asm/cf_pgtable.h>
+#include <asm/traps.h>
+#include <asm/ucontext.h>
+#include <asm/cacheflush.h>
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs);
+
+const int frame_extra_sizes[16] = {
+  [1]  = -1,
+  [2]  = sizeof(((struct frame *)0)->un.fmt2),
+  [3]  = sizeof(((struct frame *)0)->un.fmt3),
+  [4]  = 0,
+  [5]  = -1,
+  [6]  = -1,
+  [7]  = sizeof(((struct frame *)0)->un.fmt7),
+  [8]  = -1,
+  [9]  = sizeof(((struct frame *)0)->un.fmt9),
+  [10] = sizeof(((struct frame *)0)->un.fmta),
+  [11] = sizeof(((struct frame *)0)->un.fmtb),
+  [12] = -1,
+  [13] = -1,
+  [14] = -1,
+  [15] = -1,
+};
+
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+asmlinkage int do_sigsuspend(struct pt_regs *regs)
+{
+       old_sigset_t mask = regs->d3;
+       sigset_t saveset;
+
+       mask &= _BLOCKABLE;
+       spin_lock_irq(&current->sighand->siglock);
+       saveset = current->blocked;
+       siginitset(&current->blocked, mask);
+       recalc_sigpending();
+       spin_unlock_irq(&current->sighand->siglock);
+
+       regs->d0 = -EINTR;
+       while (1) {
+               current->state = TASK_INTERRUPTIBLE;
+               schedule();
+               if (do_signal(&saveset, regs))
+                       return -EINTR;
+       }
+}
+
+asmlinkage int
+do_rt_sigsuspend(struct pt_regs *regs)
+{
+       sigset_t __user *unewset = (sigset_t __user *)regs->d1;
+       size_t sigsetsize = (size_t)regs->d2;
+       sigset_t saveset, newset;
+
+       /* XXX: Don't preclude handling different sized sigset_t's.  */
+       if (sigsetsize != sizeof(sigset_t))
+               return -EINVAL;
+
+       if (copy_from_user(&newset, unewset, sizeof(newset)))
+               return -EFAULT;
+       sigdelsetmask(&newset, ~_BLOCKABLE);
+
+       spin_lock_irq(&current->sighand->siglock);
+       saveset = current->blocked;
+       current->blocked = newset;
+       recalc_sigpending();
+       spin_unlock_irq(&current->sighand->siglock);
+
+       regs->d0 = -EINTR;
+       while (1) {
+               current->state = TASK_INTERRUPTIBLE;
+               schedule();
+               if (do_signal(&saveset, regs))
+                       return -EINTR;
+       }
+}
+
+asmlinkage int
+sys_sigaction(int sig, const struct old_sigaction __user *act,
+             struct old_sigaction __user *oact)
+{
+       struct k_sigaction new_ka, old_ka;
+       int ret;
+
+       if (act) {
+               old_sigset_t mask;
+               if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
+                   __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
+                   __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
+                       return -EFAULT;
+               __get_user(new_ka.sa.sa_flags, &act->sa_flags);
+               __get_user(mask, &act->sa_mask);
+               siginitset(&new_ka.sa.sa_mask, mask);
+       }
+
+       ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+
+       if (!ret && oact) {
+               if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
+                   __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
+                   __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
+                       return -EFAULT;
+               __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
+               __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
+       }
+
+       return ret;
+}
+
+asmlinkage int
+sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
+{
+       return do_sigaltstack(uss, uoss, rdusp());
+}
+
+
+/*
+ * Do a signal return; undo the signal stack.
+ *
+ * Keep the return code on the stack quadword aligned!
+ * That makes the cache flush below easier.
+ */
+
+struct sigframe
+{
+       char __user *pretcode;
+       int sig;
+       int code;
+       struct sigcontext __user *psc;
+       char retcode[8];
+       unsigned long extramask[_NSIG_WORDS-1];
+       struct sigcontext sc;
+};
+
+struct rt_sigframe
+{
+       char __user *pretcode;
+       int sig;
+       struct siginfo __user *pinfo;
+       void __user *puc;
+       char retcode[8];
+       struct siginfo info;
+       struct ucontext uc;
+};
+
+#define FPCONTEXT_SIZE 216
+#define uc_fpstate     uc_filler[0]
+#define uc_formatvec   uc_filler[FPCONTEXT_SIZE/4]
+#define uc_extra       uc_filler[FPCONTEXT_SIZE/4+1]
+
+#ifdef CONFIG_FPU
+static unsigned char fpu_version; /* version num of fpu, set by setup_frame */
+
+static inline int restore_fpu_state(struct sigcontext *sc)
+{
+       int err = 1;
+
+       if (FPU_IS_EMU) {
+           /* restore registers */
+           memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
+           memcpy(current->thread.fp, sc->sc_fpregs, 24);
+           return 0;
+       }
+
+       if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
+           /* Verify the frame format.  */
+           if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
+               goto out;
+           if (CPU_IS_020_OR_030) {
+               if (m68k_fputype & FPU_68881 &&
+                   !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
+                   goto out;
+               if (m68k_fputype & FPU_68882 &&
+                   !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
+                   goto out;
+           } else if (CPU_IS_040) {
+               if (!(sc->sc_fpstate[1] == 0x00 ||
+                     sc->sc_fpstate[1] == 0x28 ||
+                     sc->sc_fpstate[1] == 0x60))
+                   goto out;
+           } else if (CPU_IS_060) {
+               if (!(sc->sc_fpstate[3] == 0x00 ||
+                     sc->sc_fpstate[3] == 0x60 ||
+                     sc->sc_fpstate[3] == 0xe0))
+                   goto out;
+           } else if (CPU_IS_CFV4E) {
+               pr_debug("restore v4e fpu state at %s\n", __func__);
+           } else
+               goto out;
+#ifdef CONFIG_CFV4E
+           __asm__ volatile ("fmovem  %0,%/fp0-%/fp1\n\t"
+                             QCHIP_RESTORE_DIRECTIVE
+                             : /* no outputs */
+                             : "m" (sc->sc_fpregs[0][0])
+                             : "memory");
+           __asm__ volatile ("fmovel %0,%/fpcr"
+                             : : "m" (sc->sc_fpcntl[0])
+                             : "memory" );
+           __asm__ volatile ("fmovel %0,%/fpsr"
+                             : : "m" (sc->sc_fpcntl[1])
+                             : "memory" );
+           __asm__ volatile ("fmovel %0,%/fpiar"
+                             : : "m" (sc->sc_fpcntl[2])
+                             : "memory" );
+
+#endif
+       }
+
+#ifdef CONFIG_CFV4E
+        __asm__ volatile ("frestore %0\n\t"
+                          QCHIP_RESTORE_DIRECTIVE : : "m" (*sc->sc_fpstate));
+#endif
+       err = 0;
+
+out:
+       return err;
+}
+
+static inline int rt_restore_fpu_state(struct ucontext __user *uc)
+{
+       unsigned char fpstate[FPCONTEXT_SIZE];
+       int context_size = CPU_IS_060 ? 8 : 0;
+       fpregset_t fpregs;
+       int err = 1;
+
+       if (FPU_IS_EMU) {
+               /* restore fpu control register */
+               if (__copy_from_user(current->thread.fpcntl,
+                               uc->uc_mcontext.fpregs.f_fpcntl, 12))
+                       goto out;
+               /* restore all other fpu register */
+               if (__copy_from_user(current->thread.fp,
+                               uc->uc_mcontext.fpregs.f_fpregs, 96))
+                       goto out;
+               return 0;
+       }
+
+       if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
+               goto out;
+       if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
+               if (!CPU_IS_060)
+                       context_size = fpstate[1];
+               /* Verify the frame format.  */
+               if (!CPU_IS_060 && (fpstate[0] != fpu_version))
+                       goto out;
+               if (CPU_IS_020_OR_030) {
+                       if (m68k_fputype & FPU_68881 &&
+                           !(context_size == 0x18 || context_size == 0xb4))
+                               goto out;
+                       if (m68k_fputype & FPU_68882 &&
+                           !(context_size == 0x38 || context_size == 0xd4))
+                               goto out;
+               } else if (CPU_IS_040) {
+                       if (!(context_size == 0x00 ||
+                             context_size == 0x28 ||
+                             context_size == 0x60))
+                               goto out;
+               } else if (CPU_IS_060) {
+                       if (!(fpstate[3] == 0x00 ||
+                             fpstate[3] == 0x60 ||
+                             fpstate[3] == 0xe0))
+                               goto out;
+               } else if (CPU_IS_CFV4E) {
+                       pr_debug("restore coldfire rt v4e fpu"
+                                " state at %s\n", __func__);
+               } else
+                       goto out;
+               if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
+                                    sizeof(fpregs)))
+                       goto out;
+#ifdef CONFIG_CFV4E
+                __asm__ volatile ("fmovem  %0,%/fp0-%/fp7\n\t"
+                                  QCHIP_RESTORE_DIRECTIVE
+                                  : /* no outputs */
+                                  : "m" (fpregs.f_fpregs[0][0])
+                                  : "memory");
+               __asm__ volatile ("fmovel %0,%/fpcr"
+                                 : : "m" (fpregs.f_fpcntl[0])
+                                 : "memory" );
+               __asm__ volatile ("fmovel %0,%/fpsr"
+                                 : : "m" (fpregs.f_fpcntl[1])
+                                 : "memory" );
+               __asm__ volatile ("fmovel %0,%/fpiar"
+                                 : : "m" (fpregs.f_fpcntl[2])
+                                 : "memory" );
+#endif
+       }
+       if (context_size &&
+           __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
+                            context_size))
+               goto out;
+#ifdef CONFIG_CFV4E
+        __asm__ volatile ("frestore %0\n\t"
+                          QCHIP_RESTORE_DIRECTIVE : : "m" (*fpstate));
+#endif
+       err = 0;
+
+out:
+       return err;
+}
+#endif
+
+static inline int
+restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc,
+       void __user *fp, int *pd0)
+{
+       int fsize, formatvec;
+       struct sigcontext context;
+       int err = 0;
+
+       /* get previous context */
+       if (copy_from_user(&context, usc, sizeof(context)))
+               goto badframe;
+
+       /* restore passed registers */
+       regs->d1 = context.sc_d1;
+       regs->a0 = context.sc_a0;
+       regs->a1 = context.sc_a1;
+       regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
+       regs->pc = context.sc_pc;
+       regs->orig_d0 = -1;             /* disable syscall checks */
+       wrusp(context.sc_usp);
+       formatvec = context.sc_formatvec;
+       regs->format = formatvec >> 12;
+       regs->vector = formatvec & 0xfff;
+
+#ifdef CONFIG_FPU
+       err = restore_fpu_state(&context);
+#endif
+
+       fsize = frame_extra_sizes[regs->format];
+       if (fsize < 0) {
+               /*
+                * user process trying to return with weird frame format
+                */
+#ifdef DEBUG
+               printk(KERN_DEBUG "user process returning with weird \
+                       frame format\n");
+#endif
+               goto badframe;
+       }
+
+       /* OK.  Make room on the supervisor stack for the extra junk,
+        * if necessary.
+        */
+
+       {
+               struct switch_stack *sw = (struct switch_stack *)regs - 1;
+               regs->d0 = context.sc_d0;
+#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
+               __asm__ __volatile__
+                       ("   movel %0,%/sp\n\t"
+                        "   bra ret_from_signal\n"
+                        "4:\n"
+                        ".section __ex_table,\"a\"\n"
+                        "   .align 4\n"
+                        "   .long 2b,4b\n"
+                        ".previous"
+                        : /* no outputs, it doesn't ever return */
+                        : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
+                          "n" (frame_offset), "a" (fp)
+                        : "a0");
+#undef frame_offset
+               /*
+                * If we ever get here an exception occurred while
+                * building the above stack-frame.
+                */
+               goto badframe;
+       }
+
+       *pd0 = context.sc_d0;
+       return err;
+
+badframe:
+       return 1;
+}
+
+static inline int
+rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
+                   struct ucontext __user *uc, int *pd0)
+{
+       int fsize, temp;
+       greg_t __user *gregs = uc->uc_mcontext.gregs;
+       unsigned long usp;
+       int err;
+
+       err = __get_user(temp, &uc->uc_mcontext.version);
+       if (temp != MCONTEXT_VERSION)
+               goto badframe;
+       /* restore passed registers */
+       err |= __get_user(regs->d0, &gregs[0]);
+       err |= __get_user(regs->d1, &gregs[1]);
+       err |= __get_user(regs->d2, &gregs[2]);
+       err |= __get_user(regs->d3, &gregs[3]);
+       err |= __get_user(regs->d4, &gregs[4]);
+       err |= __get_user(regs->d5, &gregs[5]);
+       err |= __get_user(sw->d6, &gregs[6]);
+       err |= __get_user(sw->d7, &gregs[7]);
+       err |= __get_user(regs->a0, &gregs[8]);
+       err |= __get_user(regs->a1, &gregs[9]);
+       err |= __get_user(regs->a2, &gregs[10]);
+       err |= __get_user(sw->a3, &gregs[11]);
+       err |= __get_user(sw->a4, &gregs[12]);
+       err |= __get_user(sw->a5, &gregs[13]);
+       err |= __get_user(sw->a6, &gregs[14]);
+       err |= __get_user(usp, &gregs[15]);
+       wrusp(usp);
+       err |= __get_user(regs->pc, &gregs[16]);
+       err |= __get_user(temp, &gregs[17]);
+       regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
+       regs->orig_d0 = -1;             /* disable syscall checks */
+       err |= __get_user(temp, &uc->uc_formatvec);
+       regs->format = temp >> 12;
+       regs->vector = temp & 0xfff;
+
+#ifdef CONFIG_FPU
+       err |= rt_restore_fpu_state(uc);
+#endif
+
+       if (do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
+               goto badframe;
+
+       fsize = frame_extra_sizes[regs->format];
+       if (fsize < 0) {
+               /*
+                * user process trying to return with weird frame format
+                */
+#ifdef DEBUG
+               printk(KERN_DEBUG "user process returning with weird \
+                       frame format\n");
+#endif
+               goto badframe;
+       }
+
+       /* OK.  Make room on the supervisor stack for the extra junk,
+        * if necessary.
+        */
+
+       {
+#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
+               __asm__ __volatile__
+                       ("   movel %0,%/sp\n\t"
+                        "   bra ret_from_signal\n"
+                        "4:\n"
+                        ".section __ex_table,\"a\"\n"
+                        "   .align 4\n"
+                        "   .long 2b,4b\n"
+                        ".previous"
+                        : /* no outputs, it doesn't ever return */
+                        : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
+                          "n" (frame_offset), "a" (&uc->uc_extra)
+                        : "a0");
+#undef frame_offset
+               /*
+                * If we ever get here an exception occurred while
+                * building the above stack-frame.
+                */
+               goto badframe;
+       }
+
+       *pd0 = regs->d0;
+       return err;
+
+badframe:
+       return 1;
+}
+
+asmlinkage int do_sigreturn(unsigned long __unused)
+{
+       struct switch_stack *sw = (struct switch_stack *) &__unused;
+       struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+       unsigned long usp = rdusp();
+       struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
+       sigset_t set;
+       int d0;
+
+       if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+               goto badframe;
+       if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
+           (_NSIG_WORDS > 1 &&
+            __copy_from_user(&set.sig[1], &frame->extramask,
+                             sizeof(frame->extramask))))
+               goto badframe;
+
+       sigdelsetmask(&set, ~_BLOCKABLE);
+       spin_lock_irq(&current->sighand->siglock);
+       current->blocked = set;
+       recalc_sigpending();
+       spin_unlock_irq(&current->sighand->siglock);
+
+       if (restore_sigcontext(regs, &frame->sc, frame + 1, &d0))
+               goto badframe;
+       return d0;
+
+badframe:
+       force_sig(SIGSEGV, current);
+       return 0;
+}
+
+asmlinkage int do_rt_sigreturn(unsigned long __unused)
+{
+       struct switch_stack *sw = (struct switch_stack *) &__unused;
+       struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+       unsigned long usp = rdusp();
+       struct rt_sigframe __user *frame =
+               (struct rt_sigframe __user *)(usp - 4);
+       sigset_t set;
+       int d0;
+
+       if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+               goto badframe;
+       if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
+               goto badframe;
+
+       sigdelsetmask(&set, ~_BLOCKABLE);
+       spin_lock_irq(&current->sighand->siglock);
+       current->blocked = set;
+       recalc_sigpending();
+       spin_unlock_irq(&current->sighand->siglock);
+
+       if (rt_restore_ucontext(regs, sw, &frame->uc, &d0))
+               goto badframe;
+       return d0;
+
+badframe:
+       force_sig(SIGSEGV, current);
+       return 0;
+}
+
+#ifdef CONFIG_FPU
+/*
+ * Set up a signal frame.
+ */
+
+static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
+{
+       if (FPU_IS_EMU) {
+               /* save registers */
+               memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
+               memcpy(sc->sc_fpregs, current->thread.fp, 24);
+               return;
+       }
+
+#ifdef CONFIG_CFV4E
+        __asm__ volatile ("fsave %0\n\t"
+                          QCHIP_RESTORE_DIRECTIVE
+                          : : "m" (*sc->sc_fpstate) : "memory");
+#endif
+
+        if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
+                fpu_version = sc->sc_fpstate[0];
+                if (CPU_IS_020_OR_030 &&
+                    regs->vector >= (VEC_FPBRUC * 4) &&
+                    regs->vector <= (VEC_FPNAN * 4)) {
+                        /* Clear pending exception in 68882 idle frame */
+                        if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
+                                sc->sc_fpstate[0x38] |= 1 << 3;
+                }
+#ifdef CONFIG_CFV4E
+                  __asm__ volatile ("fmovemd %/fp0-%/fp1,%0"
+                                  : : "m" (sc->sc_fpregs[0][0])
+                                  : "memory");
+                 __asm__ volatile ("fmovel %/fpcr,%0"
+                                  : : "m" (sc->sc_fpcntl[0])
+                                  : "memory");
+                 __asm__ volatile ("fmovel %/fpsr,%0"
+                                  : : "m" (sc->sc_fpcntl[1])
+                                  : "memory");
+                 __asm__ volatile ("fmovel %/fpiar,%0"
+                                  : : "m" (sc->sc_fpcntl[2])
+                                  : "memory");
+
+#endif
+        }
+}
+
+static inline int rt_save_fpu_state(struct ucontext __user *uc,
+       struct pt_regs *regs)
+{
+       unsigned char fpstate[FPCONTEXT_SIZE];
+       int context_size = CPU_IS_060 ? 8 : 0;
+       int err = 0;
+
+       if (FPU_IS_EMU) {
+               /* save fpu control register */
+               err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
+                               current->thread.fpcntl, 12);
+               /* save all other fpu register */
+               err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
+                               current->thread.fp, 96);
+               return err;
+       }
+
+#ifdef CONFIG_CFV4E
+        __asm__ volatile ("fsave %0\n\t"
+                          QCHIP_RESTORE_DIRECTIVE
+                          : : "m" (*fpstate) : "memory");
+#endif
+       err |= __put_user(*(long *)fpstate, (long *)&uc->uc_fpstate);
+       if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
+               fpregset_t fpregs;
+               if (!CPU_IS_060)
+                       context_size = fpstate[1];
+               fpu_version = fpstate[0];
+#ifdef CONFIG_CFV4E
+                  __asm__ volatile ("fmovemd %/fp0-%/fp7,%0"
+                                  : : "m" (fpregs.f_fpregs[0][0])
+                                  : "memory");
+                 __asm__ volatile ("fmovel %/fpcr,%0"
+                                  : : "m" (fpregs.f_fpcntl[0])
+                                  : "memory");
+                 __asm__ volatile ("fmovel %/fpsr,%0"
+                                  : : "m" (fpregs.f_fpcntl[1])
+                                  : "memory");
+                 __asm__ volatile ("fmovel %/fpiar,%0"
+                                  : : "m" (fpregs.f_fpcntl[2])
+                                  : "memory");
+#endif
+               err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
+                                   sizeof(fpregs));
+       }
+       if (context_size)
+               err |= copy_to_user((long *)&uc->uc_fpstate + 1, fpstate + 4,
+                                   context_size);
+       return err;
+
+
+       return err;
+}
+#endif
+
+static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
+                            unsigned long mask)
+{
+       sc->sc_mask = mask;
+       sc->sc_usp = rdusp();
+       sc->sc_d0 = regs->d0;
+       sc->sc_d1 = regs->d1;
+       sc->sc_a0 = regs->a0;
+       sc->sc_a1 = regs->a1;
+       sc->sc_sr = regs->sr;
+       sc->sc_pc = regs->pc;
+       sc->sc_formatvec = regs->format << 12 | regs->vector;
+#ifdef CONFIG_FPU
+       save_fpu_state(sc, regs);
+#endif
+}
+
+static inline int rt_setup_ucontext(struct ucontext __user *uc,
+       struct pt_regs *regs)
+{
+       struct switch_stack *sw = (struct switch_stack *)regs - 1;
+       greg_t __user *gregs = uc->uc_mcontext.gregs;
+       int err = 0;
+
+       err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
+       err |= __put_user(regs->d0, &gregs[0]);
+       err |= __put_user(regs->d1, &gregs[1]);
+       err |= __put_user(regs->d2, &gregs[2]);
+       err |= __put_user(regs->d3, &gregs[3]);
+       err |= __put_user(regs->d4, &gregs[4]);
+       err |= __put_user(regs->d5, &gregs[5]);
+       err |= __put_user(sw->d6, &gregs[6]);
+       err |= __put_user(sw->d7, &gregs[7]);
+       err |= __put_user(regs->a0, &gregs[8]);
+       err |= __put_user(regs->a1, &gregs[9]);
+       err |= __put_user(regs->a2, &gregs[10]);
+       err |= __put_user(sw->a3, &gregs[11]);
+       err |= __put_user(sw->a4, &gregs[12]);
+       err |= __put_user(sw->a5, &gregs[13]);
+       err |= __put_user(sw->a6, &gregs[14]);
+       err |= __put_user(rdusp(), &gregs[15]);
+       err |= __put_user(regs->pc, &gregs[16]);
+       err |= __put_user(regs->sr, &gregs[17]);
+       err |= __put_user((regs->format << 12) | regs->vector,
+                         &uc->uc_formatvec);
+#ifdef CONFIG_FPU
+       err |= rt_save_fpu_state(uc, regs);
+#endif
+       return err;
+}
+
+static inline void push_cache(unsigned long vaddr)
+{
+#ifdef CONFIG_M5445X
+       pgd_t *pdir;
+       pmd_t *pmdp;
+       pte_t *ptep;
+       unsigned long paddr;
+
+       pdir = pgd_offset(current->mm, vaddr);
+       pmdp = pmd_offset(pdir, vaddr);
+       ptep = pte_offset_map(pmdp, vaddr);
+       paddr = ((pte_val(*ptep) & PAGE_MASK) | (vaddr & ~PAGE_MASK));
+       cf_icache_flush_range(paddr, paddr + 8);
+#elif CONFIG_M547X_8X
+       flush_icache_range(vaddr, vaddr + 8);
+#endif
+}
+
+static inline void __user *
+get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
+{
+       unsigned long usp;
+
+       /* Default to using normal stack.  */
+       usp = rdusp();
+
+       /* This is the X/Open sanctioned signal stack switching.  */
+       if (ka->sa.sa_flags & SA_ONSTACK) {
+               if (!sas_ss_flags(usp))
+                       usp = current->sas_ss_sp + current->sas_ss_size;
+       }
+       return (void __user *)((usp - frame_size) & -8UL);
+}
+
+static void setup_frame(int sig, struct k_sigaction *ka,
+                        sigset_t *set, struct pt_regs *regs)
+{
+       struct sigframe __user *frame;
+       int fsize = frame_extra_sizes[regs->format];
+       struct sigcontext context;
+       int err = 0;
+
+       if (fsize < 0) {
+#ifdef DEBUG
+               printk(KERN_DEBUG "setup_frame: Unknown frame format %#x\n",
+                       regs->format);
+#endif
+               goto give_sigsegv;
+       }
+
+       frame = get_sigframe(ka, regs, sizeof(*frame));
+
+       err |= __put_user((current_thread_info()->exec_domain
+                       && current_thread_info()->exec_domain->signal_invmap
+                       && sig < 32
+                       ? current_thread_info()->exec_domain->signal_invmap[sig]
+                       : sig),
+                       &frame->sig);
+
+       err |= __put_user(regs->vector, &frame->code);
+       err |= __put_user(&frame->sc, &frame->psc);
+
+       if (_NSIG_WORDS > 1)
+               err |= copy_to_user(frame->extramask, &set->sig[1],
+                                   sizeof(frame->extramask));
+
+       setup_sigcontext(&context, regs, set->sig[0]);
+       err |= copy_to_user(&frame->sc, &context, sizeof(context));
+
+       /* Set up to return from userspace.  */
+       err |= __put_user(frame->retcode, &frame->pretcode);
+       /* moveq #,d0; trap #0 */
+       err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
+                         (long __user *)(frame->retcode));
+
+       if (err)
+               goto give_sigsegv;
+
+       push_cache((unsigned long) &frame->retcode);
+
+       /* Set up registers for signal handler */
+       wrusp((unsigned long) frame);
+       regs->pc = (unsigned long) ka->sa.sa_handler;
+
+adjust_stack:
+       /* Prepare to skip over the extra stuff in the exception frame.  */
+       if (regs->stkadj) {
+               struct pt_regs *tregs =
+                       (struct pt_regs *)((ulong)regs + regs->stkadj);
+#ifdef DEBUG
+               printk(KERN_DEBUG "Performing stackadjust=%04x\n",
+                       regs->stkadj);
+#endif
+               /* This must be copied with decreasing addresses to
+                  handle overlaps.  */
+               tregs->vector = 0;
+               tregs->format = 0;
+               tregs->pc = regs->pc;
+               tregs->sr = regs->sr;
+       }
+       return;
+
+give_sigsegv:
+       force_sigsegv(sig, current);
+       goto adjust_stack;
+}
+
+static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
+       sigset_t *set, struct pt_regs *regs)
+{
+       struct rt_sigframe __user *frame;
+       int fsize = frame_extra_sizes[regs->format];
+       int err = 0;
+
+       if (fsize < 0) {
+#ifdef DEBUG
+               printk(KERN_DEBUG "setup_frame: Unknown frame format %#x\n",
+                       regs->format);
+#endif
+               goto give_sigsegv;
+       }
+
+       frame = get_sigframe(ka, regs, sizeof(*frame));
+
+       if (fsize) {
+               err |= copy_to_user(&frame->uc.uc_extra, regs + 1, fsize);
+               regs->stkadj = fsize;
+       }
+
+       err |= __put_user((current_thread_info()->exec_domain
+                       && current_thread_info()->exec_domain->signal_invmap
+                       && sig < 32
+                       ? current_thread_info()->exec_domain->signal_invmap[sig]
+                       : sig),
+                       &frame->sig);
+       err |= __put_user(&frame->info, &frame->pinfo);
+       err |= __put_user(&frame->uc, &frame->puc);
+       err |= copy_siginfo_to_user(&frame->info, info);
+
+       /* Create the ucontext.  */
+       err |= __put_user(0, &frame->uc.uc_flags);
+       err |= __put_user(NULL, &frame->uc.uc_link);
+       err |= __put_user((void __user *)current->sas_ss_sp,
+                         &frame->uc.uc_stack.ss_sp);
+       err |= __put_user(sas_ss_flags(rdusp()),
+                         &frame->uc.uc_stack.ss_flags);
+       err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
+       err |= rt_setup_ucontext(&frame->uc, regs);
+       err |= copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
+
+       /* Set up to return from userspace.  */
+       err |= __put_user(frame->retcode, &frame->pretcode);
+
+       /* movel #__NR_rt_sigreturn(0xAD),d0; trap #0 */
+       err |= __put_user(0x203c0000, (long *)(frame->retcode + 0));
+       err |= __put_user(0x00ad4e40, (long *)(frame->retcode + 4));
+
+       if (err)
+               goto give_sigsegv;
+
+       push_cache((unsigned long) &frame->retcode);
+
+       /* Set up registers for signal handler */
+       wrusp((unsigned long) frame);
+       regs->pc = (unsigned long) ka->sa.sa_handler;
+
+adjust_stack:
+       /* Prepare to skip over the extra stuff in the exception frame.  */
+       if (regs->stkadj) {
+               struct pt_regs *tregs =
+                       (struct pt_regs *)((ulong)regs + regs->stkadj);
+#ifdef DEBUG
+               printk(KERN_DEBUG "Performing stackadjust=%04x\n",
+                       regs->stkadj);
+#endif
+               /* This must be copied with decreasing addresses to
+                  handle overlaps.  */
+               tregs->vector = 0;
+               tregs->format = 0;
+               tregs->pc = regs->pc;
+               tregs->sr = regs->sr;
+       }
+       return;
+
+give_sigsegv:
+       force_sigsegv(sig, current);
+       goto adjust_stack;
+}
+
+static inline void
+handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
+{
+       switch (regs->d0) {
+       case -ERESTARTNOHAND:
+               if (!has_handler)
+                       goto do_restart;
+               regs->d0 = -EINTR;
+               break;
+
+       case -ERESTARTSYS:
+               if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
+                       regs->d0 = -EINTR;
+                       break;
+               }
+       /* fallthrough */
+       case -ERESTARTNOINTR:
+do_restart:
+               regs->d0 = regs->orig_d0;
+               regs->pc -= 2;
+               break;
+       }
+}
+
+/*
+ * OK, we're invoking a handler
+ */
+static void
+handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
+             sigset_t *oldset, struct pt_regs *regs)
+{
+       /* are we from a system call? */
+       if (regs->orig_d0 >= 0)
+               /* If so, check system call restarting.. */
+               handle_restart(regs, ka, 1);
+
+       /* set up the stack frame */
+       if (ka->sa.sa_flags & SA_SIGINFO)
+               setup_rt_frame(sig, ka, info, oldset, regs);
+       else
+               setup_frame(sig, ka, oldset, regs);
+
+       if (ka->sa.sa_flags & SA_ONESHOT)
+               ka->sa.sa_handler = SIG_DFL;
+
+       spin_lock_irq(&current->sighand->siglock);
+       sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
+       if (!(ka->sa.sa_flags & SA_NODEFER))
+               sigaddset(&current->blocked, sig);
+       recalc_sigpending();
+       spin_unlock_irq(&current->sighand->siglock);
+}
+
+/*
+ * Note that 'init' is a special process: it doesn't get signals it doesn't
+ * want to handle. Thus you cannot kill init even with a SIGKILL even by
+ * mistake.
+ */
+asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs)
+{
+       siginfo_t info;
+       struct k_sigaction ka;
+       int signr;
+
+       current->thread.esp0 = (unsigned long) regs;
+
+       if (!oldset)
+               oldset = &current->blocked;
+
+       signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+       if (signr > 0) {
+               /* Whee!  Actually deliver the signal.  */
+               handle_signal(signr, &ka, &info, oldset, regs);
+               return 1;
+       }
+
+       /* Did we come from a system call? */
+       if (regs->orig_d0 >= 0)
+               /* Restart the system call - no handlers present */
+               handle_restart(regs, NULL, 0);
+
+       return 0;
+}
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/time.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/time.c
new file mode 100644 (file)
index 0000000..a858ce0
--- /dev/null
@@ -0,0 +1,318 @@
+/*
+ *  linux/arch/m68k/coldfire/time.c
+ *
+ *  This file contains the coldfire specific time handling pieces.
+ *
+ *  Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Kurt Mahan <kmahan@freescale.com>
+ *  Jason Jin Jason.Jin@freescale.com
+ *  Shrek Wu B16972@freescale.com
+ *
+ *  based on linux/arch/m68k/kernel/time.c
+ */
+#include <linux/clk.h>
+#include <linux/clk.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+#include <linux/time.h>
+#include <linux/timex.h>
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/sysdev.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/rtc.h>
+
+#include <asm/machdep.h>
+#include <linux/io.h>
+#include <asm/irq_regs.h>
+
+#include <linux/profile.h>
+#include <asm/mcfsim.h>
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
+/*extern unsigned long long sys_dtim0_read(void);
+extern void sys_dtim_init(void);*/
+extern unsigned long long sys_dtim2_read(void);
+extern void sys_dtim2_init(void);
+static int cfv4_set_next_event(unsigned long evt,
+       struct clock_event_device *dev);
+static void cfv4_set_mode(enum clock_event_mode mode,
+       struct clock_event_device *dev);
+#if defined(CONFIG_M5445X)
+#define FREQ    (MCF_BUSCLK / 16)
+#else
+#define FREQ    (MCF_BUSCLK)
+#endif
+/*
+ * realtime clock dummy code
+ */
+
+static unsigned long null_rtc_get_time(void)
+{
+       return mktime(2008, 1, 1, 0, 0, 0);
+}
+
+static int null_rtc_set_time(unsigned long sec)
+{
+       return 0;
+}
+
+static unsigned long (*cf_rtc_get_time)(void) = null_rtc_get_time;
+static int (*cf_rtc_set_time)(unsigned long) = null_rtc_set_time;
+#endif /* CONFIG_GENERIC_CLOCKEVENTS */
+
+/*
+ * old pre-GENERIC clock code
+ */
+
+#ifndef CONFIG_GENERIC_CLOCKEVENTS
+/*
+ * timer_interrupt() needs to keep up the real-time clock,
+ * as well as call the "do_timer()" routine every clocktick
+ */
+static irqreturn_t timer_interrupt(int irq, void *dummy)
+{
+#ifdef CONFIG_COLDFIRE
+       /* kick hardware timer if necessary */
+       if (mach_tick)
+               mach_tick();
+#endif
+       do_timer(1);
+#ifndef CONFIG_SMP
+       update_process_times(user_mode(get_irq_regs()));
+#endif
+       profile_tick(CPU_PROFILING);
+
+#ifdef CONFIG_HEARTBEAT
+       /* use power LED as a heartbeat instead -- much more useful
+          for debugging -- based on the version for PReP by Cort */
+       /* acts like an actual heart beat -- ie thump-thump-pause... */
+       if (mach_heartbeat) {
+               unsigned cnt = 0, period = 0, dist = 0;
+
+               if (cnt == 0 || cnt == dist)
+                       mach_heartbeat(1);
+               else if (cnt == 7 || cnt == dist+7)
+                       mach_heartbeat(0);
+
+               if (++cnt > period) {
+                       cnt = 0;
+                       /* The hyperbolic function below modifies
+                        * the heartbeat period length in dependency
+                        * of the current (5min) load. It goes through
+                        * the points f(0)=126, f(1)=86, f(5)=51,
+                        * f(inf)->30. */
+                       period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT)))
+                                       + 30;
+                       dist = period / 4;
+               }
+       }
+#endif /* CONFIG_HEARTBEAT */
+       return IRQ_HANDLED;
+}
+
+void __init time_init(void)
+{
+       struct rtc_time time;
+
+       if (mach_hwclk) {
+               mach_hwclk(0, &time);
+               time.tm_year += 1900;
+               if (time.tm_year < 1970)
+                       time.tm_year += 100;
+               xtime.tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday,
+                                     time.tm_hour, time.tm_min, time.tm_sec);
+               xtime.tv_nsec = 0;
+       }
+       wall_to_monotonic.tv_sec = -xtime.tv_sec;
+
+       mach_sched_init(timer_interrupt);
+}
+#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
+
+#ifndef CONFIG_GENERIC_TIME
+/*
+ * This version of gettimeofday has near microsecond resolution.
+ */
+void do_gettimeofday(struct timeval *tv)
+{
+       unsigned long flags;
+       unsigned long seq;
+       unsigned long usec, sec;
+       unsigned long max_ntp_tick = tick_usec - tickadj;
+
+       do {
+               seq = read_seqbegin_irqsave(&xtime_lock, flags);
+
+               usec = mach_gettimeoffset();
+
+               /*
+                * If time_adjust is negative then NTP is slowing the clock
+                * so make sure not to go into next possible interval.
+                * Better to lose some accuracy than have time go backwards..
+                */
+               if (unlikely(time_adjust < 0))
+                       usec = min(usec, max_ntp_tick);
+
+               sec = xtime.tv_sec;
+               usec += xtime.tv_nsec/1000;
+       } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
+
+
+       while (usec >= 1000000) {
+               usec -= 1000000;
+               sec++;
+       }
+
+       tv->tv_sec = sec;
+       tv->tv_usec = usec;
+}
+EXPORT_SYMBOL(do_gettimeofday);
+
+int do_settimeofday(struct timespec *tv)
+{
+       time_t wtm_sec, sec = tv->tv_sec;
+       long wtm_nsec, nsec = tv->tv_nsec;
+
+       if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
+               return -EINVAL;
+
+       write_seqlock_irq(&xtime_lock);
+       /* This is revolting. We need to set the xtime.tv_nsec
+        * correctly. However, the value in this location is
+        * is value at the last tick.
+        * Discover what correction gettimeofday
+        * would have done, and then undo it!
+        */
+       nsec -= 1000 * mach_gettimeoffset();
+
+       wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
+       wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
+
+       set_normalized_timespec(&xtime, sec, nsec);
+       set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
+
+       ntp_clear();
+       write_sequnlock_irq(&xtime_lock);
+       clock_was_set();
+       return 0;
+}
+EXPORT_SYMBOL(do_settimeofday);
+#endif /* !CONFIG_GENERIC_TIME */
+
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
+/*
+ * Clock Evnt setup
+ */
+static struct clock_event_device clockevent_cfv4 = {
+       .name           = "CFV4 timer2even",
+       .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+       .rating         = 200,
+       .shift          = 20,
+       .set_mode       = cfv4_set_mode,
+       .set_next_event = cfv4_set_next_event,
+};
+
+static int cfv4_set_next_event(unsigned long evt,
+       struct clock_event_device *dev)
+{
+       return 0;
+}
+
+static void cfv4_set_mode(enum clock_event_mode mode,
+       struct clock_event_device *dev)
+{
+       if (mode != CLOCK_EVT_MODE_ONESHOT)
+               cfv4_set_next_event((FREQ / HZ), dev);
+}
+
+static int __init cfv4_clockevent_init(void)
+{
+       clockevent_cfv4.mult =
+                       div_sc(FREQ, NSEC_PER_SEC,
+                       clockevent_cfv4.shift);
+       clockevent_cfv4.max_delta_ns =
+               clockevent_delta2ns((FREQ / HZ),
+                       &clockevent_cfv4);
+       clockevent_cfv4.min_delta_ns =
+               clockevent_delta2ns(1, &clockevent_cfv4);
+
+       clockevent_cfv4.cpumask = &cpumask_of_cpu(0);
+
+       printk(KERN_INFO "timer: register clockevent\n");
+               clockevents_register_device(&clockevent_cfv4);
+
+       return 0;
+}
+
+/*
+ * clocksource setup
+ */
+
+struct clocksource clocksource_cfv4 = {
+       .name   = "ColdfireV4",
+       .rating = 250,
+       .mask   = CLOCKSOURCE_MASK(32),
+       .read   = sys_dtim2_read,
+       .shift  = 20,
+       .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+/*
+ * Initialize time subsystem.  Called from linux/init/main.c
+ */
+void __init time_init(void)
+{
+       int ret;
+
+       printk(KERN_INFO "Initializing time\n");
+#if 0
+       /* initialize system clocks */
+       clk_init();
+#endif
+       cfv4_clockevent_init();
+       /* initialize the system timer */
+       /*sys_dtim_init();*/
+       sys_dtim2_init();
+       /* setup initial system time */
+       xtime.tv_sec = cf_rtc_get_time();
+       xtime.tv_nsec = 0;
+       set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec,
+                               -xtime.tv_nsec);
+
+       /* JKM */
+       clocksource_cfv4.mult = clocksource_hz2mult(FREQ,
+                       clocksource_cfv4.shift);
+
+       /* register our clocksource */
+       ret = clocksource_register(&clocksource_cfv4);
+       if (ret)
+               printk(KERN_ERR "timer: unable to "
+                       "register clocksource - %d\n", ret);
+}
+
+/*
+ * sysfs pieces
+ */
+
+static struct sysdev_class timer_class = {
+       .name   = "timer",
+};
+
+static struct sys_device timer_device = {
+       .id     = 0,
+       .cls    = &timer_class,
+};
+
+static int __init timer_init_sysfs(void)
+{
+       int err = sysdev_class_register(&timer_class);
+       if (!err)
+               err = sysdev_register(&timer_device);
+       return err;
+}
+device_initcall(timer_init_sysfs);
+#endif /* CONFIG_GENERIC_CLOCKEVENTS */
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/traps.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/common/traps.c
new file mode 100644 (file)
index 0000000..3f96960
--- /dev/null
@@ -0,0 +1,456 @@
+/*
+ *  linux/arch/m68knommu/kernel/traps.c
+ *
+ *  Copyright Freescale Semiconductor, Inc. 2008-2009
+ *  Jason Jin Jason.Jin@freescale.com
+ *  Shrek Wu B16972@freescale.com
+ *
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License.  See the file COPYING in the main directory of this archive
+ *  for more details.
+ */
+
+/*
+ * Sets up all exception vectors
+ */
+#include <linux/sched.h>
+#include <linux/signal.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/a.out.h>
+#include <linux/user.h>
+#include <linux/string.h>
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <linux/ptrace.h>
+#include <linux/kallsyms.h>
+
+#include <asm/setup.h>
+#include <asm/fpu.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <asm/traps.h>
+#include <asm/pgtable.h>
+#include <asm/machdep.h>
+#include <asm/siginfo.h>
+
+static char const * const vec_names[] = {
+       "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR",
+       "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc",
+       "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111",
+       "UNASSIGNED RESERVED 12", "COPROCESSOR PROTOCOL VIOLATION",
+       "FORMAT ERROR", "UNINITIALIZED INTERRUPT",
+       "UNASSIGNED RESERVED 16", "UNASSIGNED RESERVED 17",
+       "UNASSIGNED RESERVED 18", "UNASSIGNED RESERVED 19",
+       "UNASSIGNED RESERVED 20", "UNASSIGNED RESERVED 21",
+       "UNASSIGNED RESERVED 22", "UNASSIGNED RESERVED 23",
+       "SPURIOUS INTERRUPT", "LEVEL 1 INT", "LEVEL 2 INT", "LEVEL 3 INT",
+       "LEVEL 4 INT", "LEVEL 5 INT", "LEVEL 6 INT", "LEVEL 7 INT",
+       "SYSCALL", "TRAP #1", "TRAP #2", "TRAP #3",
+       "TRAP #4", "TRAP #5", "TRAP #6", "TRAP #7",
+       "TRAP #8", "TRAP #9", "TRAP #10", "TRAP #11",
+       "TRAP #12", "TRAP #13", "TRAP #14", "TRAP #15",
+       "FPCP BSUN", "FPCP INEXACT", "FPCP DIV BY 0", "FPCP UNDERFLOW",
+       "FPCP OPERAND ERROR", "FPCP OVERFLOW", "FPCP SNAN",
+       "FPCP UNSUPPORTED OPERATION",
+       "MMU CONFIGURATION ERROR"
+};
+
+asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
+                            unsigned long error_code);
+asmlinkage void trap_c(struct frame *fp);
+extern void __init coldfire_trap_init(void);
+
+void __init trap_init(void)
+{
+       coldfire_trap_init();
+}
+
+/* The following table converts the FS encoding of a ColdFire
+   exception stack frame into the error_code value needed by
+   do_fault. */
+
+static const unsigned char fs_err_code[] = {
+       0,  /* 0000 */
+       0,  /* 0001 */
+       0,  /* 0010 */
+       0,  /* 0011 */
+       1,  /* 0100 */
+       0,  /* 0101 */
+       0,  /* 0110 */
+       0,  /* 0111 */
+       2,  /* 1000 */
+       3,  /* 1001 */
+       2,  /* 1010 */
+       0,  /* 1011 */
+       1,  /* 1100 */
+       1,  /* 1101 */
+       0,  /* 1110 */
+       0   /* 1111 */
+};
+
+#ifdef DEBUG
+static const char *fs_err_msg[16] = {
+       "Normal",
+       "Reserved",
+       "Interrupt during debug service routine",
+       "Reserved",
+       "X Protection",
+       "TLB X miss (opword)",
+       "TLB X miss (ext. word)",
+       "IFP in emulator mode",
+       "W Protection",
+       "Write error",
+       "TLB W miss",
+       "Reserved",
+       "R Protection",
+       "R/RMW Protection",
+       "TLB R miss",
+       "OEP in emulator mode",
+};
+#endif
+
+static inline void access_errorCF(struct frame *fp)
+{
+       unsigned long int mmusr, complainingAddress;
+       unsigned int err_code, fs;
+       int need_page_fault;
+
+       mmusr = fp->ptregs.mmusr;
+       complainingAddress = fp->ptregs.mmuar;
+#ifdef DEBUG
+       printk(KERN_DEBUG "pc %#lx, mmusr %#lx, complainingAddress %#lx\n", \
+               fp->ptregs.pc, mmusr, complainingAddress);
+#endif
+
+       /*
+        * error_code:
+        *      bit 0 == 0 means no page found, 1 means protection fault
+        *      bit 1 == 0 means read, 1 means write
+        */
+
+       fs = (fp->ptregs.fs2 << 2) | fp->ptregs.fs1;
+       switch (fs) {
+       case  5:  /* 0101 TLB opword X miss */
+               need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
+               complainingAddress = fp->ptregs.pc;
+               break;
+       case  6:  /* 0110 TLB extension word X miss */
+               need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
+               complainingAddress = fp->ptregs.pc + sizeof(long);
+               break;
+       case 10:  /* 1010 TLB W miss */
+               need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
+               break;
+       case 14: /* 1110 TLB R miss */
+               need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
+               break;
+       default:
+               /* 0000 Normal  */
+               /* 0001 Reserved */
+               /* 0010 Interrupt during debug service routine */
+               /* 0011 Reserved */
+               /* 0100 X Protection */
+               /* 0111 IFP in emulator mode */
+               /* 1000 W Protection*/
+               /* 1001 Write error*/
+               /* 1011 Reserved*/
+               /* 1100 R Protection*/
+               /* 1101 R Protection*/
+               /* 1111 OEP in emulator mode*/
+               need_page_fault = 1;
+               break;
+       }
+
+       if (need_page_fault) {
+               err_code = fs_err_code[fs];
+               if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
+                       err_code |= 2; /* bit1 - write, bit0 - protection */
+               do_page_fault(&fp->ptregs, complainingAddress, err_code);
+       }
+}
+
+void die_if_kernel(char *str, struct pt_regs *fp, int nr)
+{
+       if (!(fp->sr & PS_S))
+               return;
+
+       console_verbose();
+       printk(KERN_EMERG "%s: %08x\n", str, nr);
+       printk(KERN_EMERG "PC: [<%08lx>]", fp->pc);
+       print_symbol(" %s", fp->pc);
+       printk(KERN_EMERG "\nSR: %04x  SP: %p  a2: %08lx\n",
+              fp->sr, fp, fp->a2);
+       printk(KERN_EMERG "d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
+              fp->d0, fp->d1, fp->d2, fp->d3);
+       printk(KERN_EMERG "d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
+              fp->d4, fp->d5, fp->a0, fp->a1);
+
+       printk(KERN_EMERG "Process %s (pid: %d, stackpage=%08lx)\n",
+               current->comm, current->pid, PAGE_SIZE+(unsigned long)current);
+       show_stack(NULL, (unsigned long *)fp);
+       do_exit(SIGSEGV);
+}
+
+asmlinkage void buserr_c(struct frame *fp)
+{
+       unsigned int fs;
+
+       /* Only set esp0 if coming from user mode */
+       if (user_mode(&fp->ptregs))
+               current->thread.esp0 = (unsigned long) fp;
+
+       fs = (fp->ptregs.fs2 << 2) | fp->ptregs.fs1;
+#if defined(DEBUG)
+       printk(KERN_DEBUG "*** Bus Error *** (%x)%s\n", fs,
+               fs_err_msg[fs & 0xf]);
+#endif
+       switch (fs) {
+       case 0x5:
+       case 0x6:
+       case 0x7:
+       case 0x9:
+       case 0xa:
+       case 0xd:
+       case 0xe:
+       case 0xf:
+               access_errorCF(fp);
+               break;
+       default:
+               die_if_kernel("bad frame format", &fp->ptregs, 0);
+#if defined(DEBUG)
+               printk(KERN_DEBUG "Unknown SIGSEGV - 4\n");
+#endif
+               force_sig(SIGSEGV, current);
+       }
+}
+
+void show_trace(unsigned long *stack)
+{
+       unsigned long *endstack;
+       unsigned long addr;
+       int i;
+
+       printk("Call Trace:");
+       addr = (unsigned long)stack + THREAD_SIZE - 1;
+       endstack = (unsigned long *)(addr & -THREAD_SIZE);
+       i = 0;
+       while (stack + 1 <= endstack) {
+               addr = *stack++;
+               /*
+                * If the address is either in the text segment of the
+                * kernel, or in the region which contains vmalloc'ed
+                * memory, it *may* be the address of a calling
+                * routine; if so, print it so that someone tracing
+                * down the cause of the crash will be able to figure
+                * out the call path that was taken.
+                */
+               if (__kernel_text_address(addr)) {
+#ifndef CONFIG_KALLSYMS
+                       if (i % 5 == 0)
+                               printk("\n       ");
+#endif
+                       printk(" [<%08lx>] %pS\n", addr, (void *)addr);
+                       i++;
+               }
+       }
+       printk("\n");
+}
+
+int kstack_depth_to_print = 48;
+void show_stack(struct task_struct *task, unsigned long *stack)
+{
+       unsigned long *p;
+       unsigned long *endstack;
+       int i;
+
+       if (!stack) {
+               if (task)
+                       stack = (unsigned long *)task->thread.esp0;
+               else
+                       stack = (unsigned long *)&stack;
+       }
+       endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
+
+       printk("Stack from %08lx:", (unsigned long)stack);
+       p = stack;
+       for (i = 0; i < kstack_depth_to_print; i++) {
+               if (p + 1 > endstack)
+                       break;
+               if (i % 8 == 0)
+                       printk("\n       ");
+               printk(" %08lx", *p++);
+       }
+       printk("\n");
+       show_trace(stack);
+}
+
+void bad_super_trap(struct frame *fp)
+{
+       console_verbose();
+       if (fp->ptregs.vector < sizeof(vec_names)/sizeof(vec_names[0]))
+               printk(KERN_WARNING "*** %s ***   FORMAT=%X\n",
+                       vec_names[fp->ptregs.vector],
+                       fp->ptregs.format);
+       else
+               printk(KERN_WARNING "*** Exception %d ***   FORMAT=%X\n",
+                       fp->ptregs.vector,
+                       fp->ptregs.format);
+       printk(KERN_WARNING "Current process id is %d\n", current->pid);
+       die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
+}
+
+asmlinkage void trap_c(struct frame *fp)
+{
+       int sig;
+       siginfo_t info;
+
+       if (fp->ptregs.sr & PS_S) {
+               if (fp->ptregs.vector == VEC_TRACE) {
+                       /* traced a trapping instruction */
+                       current->ptrace |= PT_DTRACE;
+               } else
+                       bad_super_trap(fp);
+               return;
+       }
+
+       /* send the appropriate signal to the user program */
+       switch (fp->ptregs.vector) {
+       case VEC_ADDRERR:
+               info.si_code = BUS_ADRALN;
+               sig = SIGBUS;
+               break;
+       case VEC_ILLEGAL:
+       case VEC_LINE10:
+       case VEC_LINE11:
+               info.si_code = ILL_ILLOPC;
+               sig = SIGILL;
+               break;
+       case VEC_PRIV:
+               info.si_code = ILL_PRVOPC;
+               sig = SIGILL;
+               break;
+       case VEC_COPROC:
+               info.si_code = ILL_COPROC;
+               sig = SIGILL;
+               break;
+       case VEC_TRAP1: /* gdbserver breakpoint */
+               fp->ptregs.pc -= 2;
+               info.si_code = TRAP_TRACE;
+               sig = SIGTRAP;
+               break;
+       case VEC_TRAP2:
+       case VEC_TRAP3:
+       case VEC_TRAP4:
+       case VEC_TRAP5:
+       case VEC_TRAP6:
+       case VEC_TRAP7:
+       case VEC_TRAP8:
+       case VEC_TRAP9:
+       case VEC_TRAP10:
+       case VEC_TRAP11:
+       case VEC_TRAP12:
+       case VEC_TRAP13:
+       case VEC_TRAP14:
+               info.si_code = ILL_ILLTRP;
+               sig = SIGILL;
+               break;
+       case VEC_FPBRUC:
+       case VEC_FPOE:
+       case VEC_FPNAN:
+               info.si_code = FPE_FLTINV;
+               sig = SIGFPE;
+               break;
+       case VEC_FPIR:
+               info.si_code = FPE_FLTRES;
+               sig = SIGFPE;
+               break;
+       case VEC_FPDIVZ:
+               info.si_code = FPE_FLTDIV;
+               sig = SIGFPE;
+               break;
+       case VEC_FPUNDER:
+               info.si_code = FPE_FLTUND;
+               sig = SIGFPE;
+               break;
+       case VEC_FPOVER:
+               info.si_code = FPE_FLTOVF;
+               sig = SIGFPE;
+               break;
+       case VEC_ZERODIV:
+               info.si_code = FPE_INTDIV;
+               sig = SIGFPE;
+               break;
+       case VEC_CHK:
+       case VEC_TRAP:
+               info.si_code = FPE_INTOVF;
+               sig = SIGFPE;
+               break;
+       case VEC_TRACE:         /* ptrace single step */
+               info.si_code = TRAP_TRACE;
+               sig = SIGTRAP;
+               break;
+       case VEC_TRAP15:                /* breakpoint */
+               info.si_code = TRAP_BRKPT;
+               sig = SIGTRAP;
+               break;
+       default:
+               info.si_code = ILL_ILLOPC;
+               sig = SIGILL;
+               break;
+       }
+       info.si_signo = sig;
+       info.si_errno = 0;
+       switch (fp->ptregs.format) {
+       default:
+               info.si_addr = (void *) fp->ptregs.pc;
+               break;
+       case 2:
+               info.si_addr = (void *) fp->un.fmt2.iaddr;
+               break;
+       case 7:
+               info.si_addr = (void *) fp->un.fmt7.effaddr;
+               break;
+       case 9:
+               info.si_addr = (void *) fp->un.fmt9.iaddr;
+               break;
+       case 10:
+               info.si_addr = (void *) fp->un.fmta.daddr;
+               break;
+       case 11:
+               info.si_addr = (void *) fp->un.fmtb.daddr;
+               break;
+       }
+       force_sig_info(sig, &info, current);
+}
+
+asmlinkage void set_esp0(unsigned long ssp)
+{
+       current->thread.esp0 = ssp;
+}
+
+/*
+ * The architecture-independent backtrace generator
+ */
+void dump_stack(void)
+{
+       unsigned long stack;
+
+       show_stack(current, &stack);
+}
+EXPORT_SYMBOL(dump_stack);
+
+#ifdef CONFIG_M68KFPU_EMU
+asmlinkage void fpemu_signal(int signal, int code, void *addr)
+{
+       siginfo_t info;
+
+       info.si_signo = signal;
+       info.si_errno = 0;
+       info.si_code = code;
+       info.si_addr = addr;
+       force_sig_info(signal, &info, current);
+}
+#endif
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_dma.h b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_dma.h
new file mode 100644 (file)
index 0000000..e3e9ac9
--- /dev/null
@@ -0,0 +1,431 @@
+/*
+ * drivers/dma/MCD_dma.h
+ *
+ * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Kurt Mahan <kmahan@freescale.com>
+ * Shrek Wu b16972@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _MCD_API_H
+#define _MCD_API_H
+
+/*
+ * Turn Execution Unit tasks ON (#define) or OFF (#undef)
+ */
+#undef MCD_INCLUDE_EU
+
+/*
+ * Number of DMA channels
+ */
+#define NCHANNELS 16
+
+/*
+ * Total number of variants
+ */
+#ifdef MCD_INCLUDE_EU
+#define NUMOFVARIANTS   6
+#else
+#define NUMOFVARIANTS   4
+#endif
+
+/*
+ * Define sizes of the various tables
+ */
+#define TASK_TABLE_SIZE     (NCHANNELS*32)
+#define VAR_TAB_SIZE        (128)
+#define CONTEXT_SAVE_SIZE   (128)
+#define FUNCDESC_TAB_SIZE   (256)
+
+#ifdef MCD_INCLUDE_EU
+#define FUNCDESC_TAB_NUM    16
+#else
+#define FUNCDESC_TAB_NUM    1
+#endif
+
+
+#ifndef DEFINESONLY
+
+/*
+ * Portability typedefs
+ */
+typedef int s32;
+typedef unsigned int u32;
+typedef short s16;
+typedef unsigned short u16;
+typedef char s8;
+typedef unsigned char u8;
+
+/*
+ * These structures represent the internal registers of the
+ * multi-channel DMA
+ */
+struct dmaRegs_s {
+   u32 taskbar;         /* task table base address register */
+   u32 currPtr;
+   u32 endPtr;
+   u32 varTablePtr;
+   u16 dma_rsvd0;
+   u16 ptdControl;      /* ptd control */
+   u32 intPending;      /* interrupt pending register */
+   u32 intMask;         /* interrupt mask register */
+   u16 taskControl[16]; /* task control registers */
+   u8  priority[32];    /* priority registers */
+   u32 initiatorMux;    /* initiator mux control */
+   u32 taskSize0;       /* task size control register 0. */
+   u32 taskSize1;       /* task size control register 1. */
+   u32 dma_rsvd1;       /* reserved */
+   u32 dma_rsvd2;       /* reserved */
+   u32 debugComp1;      /* debug comparator 1 */
+   u32 debugComp2;      /* debug comparator 2 */
+   u32 debugControl;    /* debug control */
+   u32 debugStatus;     /* debug status */
+   u32 ptdDebug;        /* priority task decode debug */
+   u32 dma_rsvd3[31];   /* reserved */
+};
+typedef volatile struct dmaRegs_s dmaRegs;
+
+#endif
+
+/*
+ * PTD contrl reg bits
+ */
+#define PTD_CTL_TSK_PRI         0x8000
+#define PTD_CTL_COMM_PREFETCH   0x0001
+
+/*
+ * Task Control reg bits and field masks
+ */
+#define TASK_CTL_EN             0x8000
+#define TASK_CTL_VALID          0x4000
+#define TASK_CTL_ALWAYS         0x2000
+#define TASK_CTL_INIT_MASK      0x1f00
+#define TASK_CTL_ASTRT          0x0080
+#define TASK_CTL_HIPRITSKEN     0x0040
+#define TASK_CTL_HLDINITNUM     0x0020
+#define TASK_CTL_ASTSKNUM_MASK  0x000f
+
+/*
+ * Priority reg bits and field masks
+ */
+#define PRIORITY_HLD            0x80
+#define PRIORITY_PRI_MASK       0x07
+
+/*
+ * Debug Control reg bits and field masks
+ */
+#define DBG_CTL_BLOCK_TASKS_MASK    0xffff0000
+#define DBG_CTL_AUTO_ARM            0x00008000
+#define DBG_CTL_BREAK               0x00004000
+#define DBG_CTL_COMP1_TYP_MASK      0x00003800
+#define DBG_CTL_COMP2_TYP_MASK      0x00000070
+#define DBG_CTL_EXT_BREAK           0x00000004
+#define DBG_CTL_INT_BREAK           0x00000002
+
+/*
+ * PTD Debug reg selector addresses
+ * This reg must be written with a value to show the contents of
+ * one of the desired internal register.
+ */
+#define PTD_DBG_REQ             0x00
+/* shows the state of 31 initiators */
+#define PTD_DBG_TSK_VLD_INIT    0x01
+/* shows which 16 tasks are valid and
+ * have initiators asserted */
+
+
+/*
+ * General return values
+ */
+#define MCD_OK                   0
+#define MCD_ERROR               -1
+#define MCD_TABLE_UNALIGNED     -2
+#define MCD_CHANNEL_INVALID     -3
+
+/*
+ * MCD_initDma input flags
+ */
+#define MCD_RELOC_TASKS         0x00000001
+#define MCD_NO_RELOC_TASKS      0x00000000
+#define MCD_COMM_PREFETCH_EN    0x00000002
+/* Commbus Prefetching - MCF547x/548x ONLY */
+
+/*
+ * MCD_dmaStatus Status Values for each channel
+ */
+#define MCD_NO_DMA  1
+/* No DMA has been requested since reset */
+#define MCD_IDLE    2
+/* DMA active, but the initiator is currently inactive */
+#define MCD_RUNNING 3
+/* DMA active, and the initiator is currently active */
+#define MCD_PAUSED  4
+/* DMA active but it is currently paused */
+#define MCD_HALTED  5
+/* the most recent DMA has been killed with MCD_killTask() */
+#define MCD_DONE    6
+/* the most recent DMA has completed. */
+
+
+/*
+ * MCD_startDma parameter defines
+ */
+
+/*
+ * Constants for the funcDesc parameter
+ */
+/* Byte swapping: */
+#define MCD_NO_BYTE_SWAP    0x00045670
+/* to disable byte swapping. */
+#define MCD_BYTE_REVERSE    0x00076540
+/* to reverse the bytes of each u32 of the DMAed data. */
+#define MCD_U16_REVERSE     0x00067450
+/* to reverse the 16-bit halves of
+ * each 32-bit data value being DMAed.*/
+#define MCD_U16_BYTE_REVERSE    0x00054760
+/* to reverse the byte halves of each
+ * 16-bit half of each 32-bit data value DMAed */
+#define MCD_NO_BIT_REV  0x00000000
+/* do not reverse the bits of each byte DMAed. */
+#define MCD_BIT_REV     0x00088880
+/* reverse the bits of each byte DMAed */
+/* CRCing: */
+#define MCD_CRC16       0xc0100000
+/* to perform CRC-16 on DMAed data. */
+#define MCD_CRCCCITT    0xc0200000
+/* to perform CRC-CCITT on DMAed data. */
+#define MCD_CRC32       0xc0300000
+/* to perform CRC-32 on DMAed data. */
+#define MCD_CSUMINET    0xc0400000
+/* to perform internet checksums on DMAed data.*/
+#define MCD_NO_CSUM     0xa0000000
+/* to perform no checksumming. */
+
+#define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | MCD_NO_CSUM)
+#define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM)
+
+/*
+ * Constants for the flags parameter
+ */
+#define MCD_TT_FLAGS_RL   0x00000001 /* Read line */
+#define MCD_TT_FLAGS_CW   0x00000002 /* Combine Writes */
+#define MCD_TT_FLAGS_SP   0x00000004
+/* Speculative prefetch(XLB) MCF547x/548x ONLY  */
+#define MCD_TT_FLAGS_PI   0x00000040 /* Precise Increment */
+#define MCD_TT_FLAGS_MASK 0x000000ff
+#define MCD_TT_FLAGS_DEF  (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW)
+
+#define MCD_SINGLE_DMA  0x00000100 /* Unchained DMA */
+#define MCD_CHAIN_DMA              /* TBD */
+#define MCD_EU_DMA                 /* TBD */
+#define MCD_FECTX_DMA   0x00001000 /* FEC TX ring DMA */
+#define MCD_FECRX_DMA   0x00002000 /* FEC RX ring DMA */
+
+
+/* these flags are valid for MCD_startDma
+ * and the chained buffer descriptors */
+#define MCD_BUF_READY   0x80000000
+/* indicates that this buffer is now
+ * under the DMA's control */
+#define MCD_WRAP        0x20000000
+/* to tell the FEC Dmas to wrap to the first BD */
+#define MCD_INTERRUPT   0x10000000
+/* to generate an interrupt after completion of the DMA. */
+#define MCD_END_FRAME   0x08000000
+/* tell the DMA to end the frame when transferring
+ * last byte of data in buffer */
+#define MCD_CRC_RESTART 0x40000000
+/* to empty out the accumulated checksum
+ prior to performing the DMA. */
+
+/* Defines for the FEC buffer descriptor control/status word*/
+#define MCD_FEC_BUF_READY   0x8000
+#define MCD_FEC_WRAP        0x2000
+#define MCD_FEC_INTERRUPT   0x1000
+#define MCD_FEC_END_FRAME   0x0800
+
+
+/*
+ * Defines for general intuitiveness
+ */
+
+#define MCD_TRUE  1
+#define MCD_FALSE 0
+
+/*
+ * Three different cases for destination and source.
+ */
+#define MINUS1          -1
+#define ZERO            0
+#define PLUS1           1
+
+#ifndef DEFINESONLY
+
+/* Task Table Entry struct*/
+typedef struct {
+    u32 TDTstart;   /* task descriptor table start */
+    u32 TDTend;     /* task descriptor table end */
+    u32 varTab;     /* variable table start */
+    u32 FDTandFlags;    /* function descriptor table start and flags */
+    volatile u32 descAddrAndStatus;
+    volatile u32 modifiedVarTab;
+    u32 contextSaveSpace;   /* context save space start */
+    u32 literalBases;
+} TaskTableEntry;
+
+
+/* Chained buffer descriptor */
+typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
+struct MCD_bufDesc_struct {
+   u32 flags;
+/* flags describing the DMA */
+   u32 csumResult;
+/* checksum from checksumming performed since last checksum reset */
+   s8  *srcAddr;
+/* the address to move data from */
+   s8  *destAddr;
+/* the address to move data to */
+   s8  *lastDestAddr;
+/* the last address written to */
+   u32 dmaSize;
+/* the number of bytes to transfer independent of the transfer size */
+   MCD_bufDesc *next;
+/* next buffer descriptor in chain */
+   u32 info;
+/* private information about this descriptor;  DMA does not affect it */
+};
+
+/* Progress Query struct */
+typedef volatile struct MCD_XferProg_struct {
+   s8 *lastSrcAddr;
+/* the most-recent or last, post-increment source address */
+   s8 *lastDestAddr;
+/* the most-recent or last, post-increment destination address */
+   u32  dmaSize;
+/* the amount of data transferred for the current buffer */
+   MCD_bufDesc *currBufDesc;
+/* pointer to the current buffer descriptor being DMAed */
+} MCD_XferProg;
+
+
+/* FEC buffer descriptor */
+typedef volatile struct MCD_bufDescFec_struct {
+    u16 statCtrl;
+    u16 length;
+    u32 dataPointer;
+} MCD_bufDescFec;
+
+
+/*************************************************************************/
+/*
+ * API function Prototypes  - see MCD_dmaApi.c for further notes
+ */
+
+/*
+ * MCD_startDma starts a particular kind of DMA .
+ */
+int MCD_startDma(
+       int channel,
+/* the channel on which to run the DMA */
+       s8  *srcAddr,
+/* the address to move data from, or buffer-descriptor address */
+       s16 srcIncr,
+/* the amount to increment the source address per transfer */
+       s8  *destAddr,
+/* the address to move data to */
+       s16 destIncr,
+/* the amount to increment the destination address per transfer */
+       u32 dmaSize,
+/* the number of bytes to transfer independent of the transfer size */
+       u32 xferSize,
+/* the number bytes in of each data movement (1, 2, or 4) */
+       u32 initiator,
+/* what device initiates the DMA */
+       int priority,
+/* priority of the DMA */
+       u32 flags,
+/* flags describing the DMA */
+       u32 funcDesc
+/* a description of byte swapping, bit swapping, and CRC actions */
+);
+
+/*
+ * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
+ * registers, relocating and creating the appropriate task structures, and
+ * setting up some global settings
+ */
+int MCD_initDma(dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);
+
+/*
+ * MCD_dmaStatus() returns the status of the DMA on the requested channel.
+ */
+int MCD_dmaStatus(int channel);
+
+/*
+ * MCD_XferProgrQuery() returns progress of DMA on requested channel
+ */
+int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep);
+
+/*
+ * MCD_killDma() halts the DMA on the requested channel, without any
+ * intention of resuming the DMA.
+ */
+int MCD_killDma(int channel);
+
+/*
+ * MCD_continDma() continues a DMA which as stopped due to encountering an
+ * unready buffer descriptor.
+ */
+int MCD_continDma(int channel);
+
+/*
+ * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
+ * running on that channel).
+ */
+int MCD_pauseDma(int channel);
+
+/*
+ * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
+ * running on that channel).
+ */
+int MCD_resumeDma(int channel);
+
+/*
+ * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
+ */
+int MCD_csumQuery(int channel, u32 *csum);
+
+/*
+ * MCD_getCodeSize provides the packed size required by the microcoded task
+ * and structures.
+ */
+int MCD_getCodeSize(void);
+
+/*
+ * MCD_getVersion provides a pointer to a version string and returns a
+ * version number.
+ */
+int MCD_getVersion(char **longVersion);
+
+/* macro for setting a location in the variable table */
+#define MCD_SET_VAR(taskTab, idx, value) \
+       ((u32 *)(taskTab)->varTab)[idx] = value
+   /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
+      so I'm avoiding surrounding it with "do {} while(0)" */
+
+#endif  /* DEFINESONLY */
+
+#endif /* _MCD_API_H */
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_dmaApi.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_dmaApi.c
new file mode 100644 (file)
index 0000000..9609d0c
--- /dev/null
@@ -0,0 +1,1045 @@
+/*
+ * drivers/dma/MCD_dmaApi.c
+ *
+ * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Kurt Mahan <kmahan@freescale.com>
+ * Shrek Wu b16972@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include "MCD_dma.h"
+#include "MCD_tasksInit.h"
+#include "MCD_progCheck.h"
+
+/********************************************************************/
+/*
+ * This is an API-internal pointer to the DMA's registers
+ */
+dmaRegs *MCD_dmaBar;
+
+/*
+ * These are the real and model task tables as generated by the
+ * build process
+ */
+extern TaskTableEntry MCD_realTaskTableSrc[NCHANNELS];
+extern TaskTableEntry MCD_modelTaskTableSrc[NUMOFVARIANTS];
+
+/*
+ * However, this (usually) gets relocated to on-chip SRAM, at which
+ * point we access them as these tables
+ */
+volatile TaskTableEntry *MCD_taskTable;
+TaskTableEntry *MCD_modelTaskTable;
+
+
+/*
+ * MCD_chStatus[] is an array of status indicators for remembering
+ * whether a DMA has ever been attempted on each channel, pausing
+ * status, etc.
+ */
+static int MCD_chStatus[NCHANNELS] =
+{
+    MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
+    MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
+    MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
+    MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA
+};
+
+/*
+ * Prototypes for local functions
+ */
+static void MCD_memcpy(int *dest, int *src, u32 size);
+static void MCD_resmActions(int channel);
+
+/*
+ * Buffer descriptors used for storage of progress info for single Dmas
+ * Also used as storage for the DMA for CRCs for single DMAs
+ * Otherwise, the DMA does not parse these buffer descriptors
+ */
+#ifdef MCD_INCLUDE_EU
+extern MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
+#else
+MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
+#endif
+MCD_bufDesc *MCD_relocBuffDesc;
+
+
+/*
+ * Defines for the debug control register's functions
+ */
+#define DBG_CTL_COMP1_TASK  (0x00002000)
+/* have comparator 1 look for a task # */
+#define DBG_CTL_ENABLE  (DBG_CTL_AUTO_ARM    | \
+                       DBG_CTL_BREAK       | \
+                       DBG_CTL_INT_BREAK   | \
+                       DBG_CTL_COMP1_TASK)
+#define DBG_CTL_DISABLE        (DBG_CTL_AUTO_ARM    | \
+                       DBG_CTL_INT_BREAK   | \
+                       DBG_CTL_COMP1_TASK)
+#define DBG_KILL_ALL_STAT   (0xFFFFFFFF)
+
+/*
+ * Offset to context save area where progress info is stored
+ */
+#define CSAVE_OFFSET        10
+
+/*
+ * Defines for Byte Swapping
+ */
+#define MCD_BYTE_SWAP_KILLER    0xFFF8888F
+#define MCD_NO_BYTE_SWAP_ATALL  0x00040000
+
+/*
+ * Execution Unit Identifiers
+ */
+#define MAC  0  /* legacy - not used */
+#define LUAC 1  /* legacy - not used */
+#define CRC  2  /* legacy - not used */
+#define LURC 3  /* Logic Unit with CRC */
+
+/*
+ * Task Identifiers
+ */
+#define TASK_CHAINNOEU  0
+#define TASK_SINGLENOEU 1
+#ifdef MCD_INCLUDE_EU
+#define TASK_CHAINEU    2
+#define TASK_SINGLEEU   3
+#define TASK_FECRX      4
+#define TASK_FECTX      5
+#else
+#define TASK_CHAINEU    0
+#define TASK_SINGLEEU   1
+#define TASK_FECRX      2
+#define TASK_FECTX      3
+#endif
+
+/*
+ * Structure to remember which variant is on which channel
+ */
+typedef struct MCD_remVariants_struct MCD_remVariant;
+struct MCD_remVariants_struct {
+   int remDestRsdIncr[NCHANNELS];  /* -1,0,1 */
+   int remSrcRsdIncr[NCHANNELS];   /* -1,0,1 */
+   s16 remDestIncr[NCHANNELS];     /* DestIncr */
+   s16 remSrcIncr[NCHANNELS];      /* srcIncr */
+   u32 remXferSize[NCHANNELS];     /* xferSize */
+};
+
+/*
+ * Structure to remember the startDma parameters for each channel
+ */
+MCD_remVariant MCD_remVariants;
+
+/********************************************************************/
+/*
+ * Function: MCD_initDma
+ * Purpose:  Initializes the DMA API by setting up a pointer to the DMA
+ *           registers, relocating and creating the appropriate task
+ *           structures, and setting up some global settings
+ * Arguments:
+ *  dmaBarAddr    - pointer to the multichannel DMA registers
+ *  taskTableDest - location to move DMA task code and structs to
+ *  flags         - operational parameters
+ * Return Value:
+ *  MCD_TABLE_UNALIGNED if taskTableDest is not 512-byte aligned
+ *  MCD_OK otherwise
+ */
+extern u32 MCD_funcDescTab0[];
+
+int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
+{
+       int i;
+       TaskTableEntry *entryPtr;
+
+       /* Setup the local pointer to register set */
+       MCD_dmaBar = dmaBarAddr;
+
+       /* Do we need to move/create a task table */
+       if ((flags & MCD_RELOC_TASKS) != 0) {
+               int fixedSize;
+               u32 *fixedPtr;
+               int varTabsOffset, funcDescTabsOffset;
+               int contextSavesOffset;
+               int taskDescTabsOffset;
+               int taskTableSize, varTabsSize;
+               int funcDescTabsSize, contextSavesSize;
+               int taskDescTabSize;
+               int i;
+
+               /* Check if physical address is
+                * aligned on 512 byte boundary */
+               if (((u32)taskTableDest & 0x000001ff) != 0)
+                       return MCD_TABLE_UNALIGNED;
+
+               MCD_taskTable = taskTableDest;
+               /* set up local pointer to task Table */
+
+               /*
+               * Create a task table:
+               * compute aligned base offsets for variable tables and
+               * function descriptor tables, then
+               * loop through the task table and setup the pointers
+               *copy over model task table with the the actual
+               *task descriptor tables
+               */
+               taskTableSize = NCHANNELS * sizeof(TaskTableEntry);
+               /* Align variable tables to size */
+               varTabsOffset = taskTableSize + (u32)taskTableDest;
+               if ((varTabsOffset & (VAR_TAB_SIZE - 1)) != 0)
+                       varTabsOffset = (varTabsOffset + VAR_TAB_SIZE)
+                               & (~VAR_TAB_SIZE);
+               /* Align function descriptor tables */
+               varTabsSize = NCHANNELS * VAR_TAB_SIZE;
+               funcDescTabsOffset = varTabsOffset + varTabsSize;
+
+               if ((funcDescTabsOffset & (FUNCDESC_TAB_SIZE - 1)) != 0)
+                       funcDescTabsOffset = (funcDescTabsOffset
+                               + FUNCDESC_TAB_SIZE) &
+                               (~FUNCDESC_TAB_SIZE);
+
+               funcDescTabsSize = FUNCDESC_TAB_NUM * FUNCDESC_TAB_SIZE;
+               contextSavesOffset = funcDescTabsOffset
+                       + funcDescTabsSize;
+               contextSavesSize = (NCHANNELS * CONTEXT_SAVE_SIZE);
+               fixedSize = taskTableSize + varTabsSize +
+                       funcDescTabsSize + contextSavesSize;
+
+               /* Zero the thing out */
+               fixedPtr = (u32 *)taskTableDest;
+               for (i = 0; i < (fixedSize/4); i++)
+                       fixedPtr[i] = 0;
+
+               entryPtr = (TaskTableEntry *)MCD_taskTable;
+               /* Set up fixed pointers */
+               for (i = 0; i < NCHANNELS; i++) {
+                       entryPtr[i].varTab = (u32)varTabsOffset;
+                       /* update ptr to local value */
+                       entryPtr[i].FDTandFlags =
+                       (u32)funcDescTabsOffset | MCD_TT_FLAGS_DEF;
+                       entryPtr[i].contextSaveSpace =
+                               (u32)contextSavesOffset;
+                       varTabsOffset += VAR_TAB_SIZE;
+#ifdef MCD_INCLUDE_EU
+                       /* if not there is only one,
+                       * just point to the same one */
+                       funcDescTabsOffset += FUNCDESC_TAB_SIZE;
+#endif
+                       contextSavesOffset += CONTEXT_SAVE_SIZE;
+               }
+               /* Copy over the function descriptor table */
+               for (i = 0; i < FUNCDESC_TAB_NUM; i++) {
+                       MCD_memcpy((void *)(entryPtr[i].FDTandFlags
+                               & ~MCD_TT_FLAGS_MASK),
+                               (void *)MCD_funcDescTab0,
+                               FUNCDESC_TAB_SIZE);
+               }
+
+               /* Copy model task table to where the
+                * context save stuff leaves off */
+               MCD_modelTaskTable =
+                       (TaskTableEntry *)contextSavesOffset;
+
+               MCD_memcpy((void *)MCD_modelTaskTable,
+                       (void *)MCD_modelTaskTableSrc,
+                       NUMOFVARIANTS * sizeof(TaskTableEntry));
+
+               /* Point to local version of model task table */
+               entryPtr = MCD_modelTaskTable;
+               taskDescTabsOffset = (u32)MCD_modelTaskTable +
+                       (NUMOFVARIANTS * sizeof(TaskTableEntry));
+
+               /* Copy actual task code and update TDT ptrs
+                * in local model task table */
+               for (i = 0; i < NUMOFVARIANTS; i++) {
+                       taskDescTabSize = entryPtr[i].TDTend
+                               - entryPtr[i].TDTstart + 4;
+                       MCD_memcpy((void *)taskDescTabsOffset,
+                               (void *)entryPtr[i].TDTstart,
+                               taskDescTabSize);
+                       entryPtr[i].TDTstart =
+                               (u32)taskDescTabsOffset;
+                       taskDescTabsOffset += taskDescTabSize;
+                       entryPtr[i].TDTend =
+                               (u32)taskDescTabsOffset - 4;
+               }
+#ifdef MCD_INCLUDE_EU
+               /*
+                * Tack single DMA BDs onto end of
+                * code so API controls where
+                * they are since DMA might write to them
+                */
+               MCD_relocBuffDesc = (MCD_bufDesc *)
+                       (entryPtr[NUMOFVARIANTS - 1].TDTend + 4);
+#else
+               /*
+                * DMA does not touch them so they
+                * can be wherever and we don't need to
+                * waste SRAM on them
+                */
+               MCD_relocBuffDesc = MCD_singleBufDescs;
+#endif
+       } else {
+               /*
+                * Point the would-be relocated task tables and
+                * the buffer descriptors
+                * to the ones the linker generated
+                */
+               if (((u32)MCD_realTaskTableSrc & 0x000001ff) != 0)
+                       return MCD_TABLE_UNALIGNED;
+
+               entryPtr = MCD_realTaskTableSrc;
+               for (i = 0; i < NCHANNELS; i++) {
+                       if (((entryPtr[i].varTab
+                               & (VAR_TAB_SIZE - 1)) != 0) ||
+                               ((entryPtr[i].FDTandFlags &
+                               (FUNCDESC_TAB_SIZE - 1)) != 0))
+                               return MCD_TABLE_UNALIGNED;
+               }
+
+               MCD_taskTable = MCD_realTaskTableSrc;
+               MCD_modelTaskTable = MCD_modelTaskTableSrc;
+               MCD_relocBuffDesc = MCD_singleBufDescs;
+       }
+
+       /* Make all channels inactive,
+        * and remember them as such: */
+       MCD_dmaBar->taskbar = (u32) MCD_taskTable;
+       for (i = 0;  i < NCHANNELS;  i++) {
+               MCD_dmaBar->taskControl[i] = 0x0;
+               MCD_chStatus[i] = MCD_NO_DMA;
+       }
+
+       /* Set up pausing mechanism to inactive state: */
+       MCD_dmaBar->debugComp1 = 0;
+       MCD_dmaBar->debugComp2 = 0;
+       MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
+       MCD_dmaBar->debugStatus = DBG_KILL_ALL_STAT;
+
+       /* Enable or disable commbus prefetch */
+       if ((flags & MCD_COMM_PREFETCH_EN) != 0)
+               MCD_dmaBar->ptdControl &= ~PTD_CTL_COMM_PREFETCH;
+       else
+               MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH;
+
+       return MCD_OK;
+}
+/*********************** End of MCD_initDma() ***********************/
+
+/********************************************************************/
+/* Function:   MCD_dmaStatus
+ * Purpose:    Returns the status of the DMA on the requested channel
+ * Arguments:  channel - channel number
+ * Returns:    Predefined status indicators
+ */
+int MCD_dmaStatus(int channel)
+{
+       u16 tcrValue;
+
+       if ((channel < 0) || (channel >= NCHANNELS))
+               return MCD_CHANNEL_INVALID;
+
+       tcrValue = MCD_dmaBar->taskControl[channel];
+       if ((tcrValue & TASK_CTL_EN) == 0) {
+               /* Nothing running if last reported
+                * with task enabled */
+               if (MCD_chStatus[channel] == MCD_RUNNING
+                       || MCD_chStatus[channel] == MCD_IDLE)
+                       MCD_chStatus[channel] = MCD_DONE;
+       } else /* something is running */{
+               /* There are three possibilities:
+                * paused, running or idle. */
+               if (MCD_chStatus[channel] == MCD_RUNNING
+                       || MCD_chStatus[channel] == MCD_IDLE) {
+                       MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
+                       /* Determine which initiator
+                        * is asserted. */
+                       if ((MCD_dmaBar->ptdDebug >> channel) & 0x1)
+                               MCD_chStatus[channel] = MCD_RUNNING;
+                       else
+                               MCD_chStatus[channel] = MCD_IDLE;
+               /* Do not change the status if it is already paused */
+               }
+       }
+       return MCD_chStatus[channel];
+}
+/******************** End of MCD_dmaStatus() ************************/
+
+/********************************************************************/
+/* Function:    MCD_startDma
+ * Ppurpose:    Starts a particular kind of DMA
+ * Arguments:   see below
+ * Returns:     MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
+ */
+
+int MCD_startDma(
+       int  channel,
+/* the channel on which to run the DMA */
+       s8   *srcAddr,
+/* the address to move data from,
+ * or physical buffer-descriptor address */
+       s16  srcIncr,
+/* the amount to increment the source
+ * address per transfer */
+       s8   *destAddr,
+/* the address to move data to */
+       s16  destIncr,
+/* the amount to increment the
+ * destination address per transfer */
+       u32  dmaSize,
+/* the number of bytes to transfer
+ * independent of the transfer size */
+       u32  xferSize,
+/* the number bytes in of each data
+ * movement (1, 2, or 4) */
+       u32  initiator,
+/* what device initiates the DMA */
+       int  priority,
+/* priority of the DMA */
+       u32  flags,
+/* flags describing the DMA */
+       u32  funcDesc
+/* a description of byte swapping,
+ * bit swapping, and CRC actions */
+#ifdef MCD_NEED_ADDR_TRANS
+       s8   *srcAddrVirt
+/* virtual buffer descriptor address TBD*/
+#endif
+)
+{
+       int srcRsdIncr, destRsdIncr;
+       int *cSave;
+       short xferSizeIncr;
+       int tcrCount = 0;
+#ifdef MCD_INCLUDE_EU
+       u32 *realFuncArray;
+#endif
+
+       if ((channel < 0) || (channel >= NCHANNELS))
+               return MCD_CHANNEL_INVALID;
+
+#ifndef MCD_INCLUDE_EU
+       funcDesc = MCD_FUNC_NOEU1;
+#endif
+
+#ifdef MCD_DEBUG
+       printf("startDma:Setting up params\n");
+#endif
+
+       /* Enable task-wise priority */
+       MCD_dmaBar->ptdControl |= (u16) 0x8000;
+
+       /* Calculate additional parameters
+        * to the regular DMA calls. */
+       srcRsdIncr = srcIncr < 0 ? -1 : (srcIncr > 0 ? 1 : 0);
+       destRsdIncr = destIncr < 0 ? -1 : (destIncr > 0 ? 1 : 0);
+       xferSizeIncr = (xferSize & 0xffff) | 0x20000000;
+
+       /* Remember which variant is running for each channel */
+       MCD_remVariants.remSrcRsdIncr[channel] = srcRsdIncr;
+       MCD_remVariants.remDestRsdIncr[channel] = destRsdIncr;
+       MCD_remVariants.remDestIncr[channel] = destIncr;
+       MCD_remVariants.remSrcIncr[channel] = srcIncr;
+       MCD_remVariants.remXferSize[channel] = xferSize;
+
+       cSave = (int *)(MCD_taskTable[channel].contextSaveSpace)
+               + CSAVE_OFFSET
+               + CURRBD;
+
+#ifdef MCD_INCLUDE_EU
+       realFuncArray = (u32 *)(MCD_taskTable[channel].FDTandFlags
+                       & 0xffffff00);
+
+       /*
+       * Modify the LURC's normal and byte-residue-loop functions
+       * according to parameter.
+       */
+       switch (xferSize) {
+       case 4:
+               realFuncArray[(LURC*16)] = funcDesc;
+               break;
+       case 2:
+               realFuncArray[(LURC*16)] = funcDesc & 0xfffff00f;
+               break;
+       case 1:
+       default:
+               realFuncArray[(LURC*16)] = funcDesc & 0xffff000f;
+               break;
+       }
+
+       realFuncArray[(LURC*16 + 1)] = 0
+               | (funcDesc & MCD_BYTE_SWAP_KILLER)
+               | MCD_NO_BYTE_SWAP_ATALL;
+#endif
+
+       /* Write the initiator field in the TCR and
+        * set the initiator-hold bit*/
+       MCD_dmaBar->taskControl[channel] = 0
+               | (initiator << 8)
+               | TASK_CTL_HIPRITSKEN
+               | TASK_CTL_HLDINITNUM;
+
+       /*
+       * Current versions of the MPC8220 MCD have a hardware quirk that could
+       * cause the write to the TCR to collide with an MDE access to the
+       * initiator-register file, so we have to verify that the write occurred
+       * correctly by reading back the value.  On MCF547x/8x devices and any
+       * future revisions of the MPC8220, this loop will not be entered.
+       */
+       while (((MCD_dmaBar->taskControl[channel] & 0x1fff) !=
+               ((initiator << 8) | TASK_CTL_HIPRITSKEN
+                | TASK_CTL_HLDINITNUM)) && (tcrCount < 1000))  {
+               tcrCount++;
+               MCD_dmaBar->taskControl[channel] = 0
+                       | (initiator << 8)
+                       | TASK_CTL_HIPRITSKEN
+                       | TASK_CTL_HLDINITNUM;
+       }
+
+       MCD_dmaBar->priority[channel] = (u8)priority & PRIORITY_PRI_MASK;
+
+       if (channel < 8 && channel >= 0) {
+               MCD_dmaBar->taskSize0 &= ~(0xf << (7-channel)*4);
+               MCD_dmaBar->taskSize0
+                       |= (xferSize & 3) << (((7 - channel)*4) + 2);
+               MCD_dmaBar->taskSize0
+                       |= (xferSize & 3) << ((7 - channel)*4);
+       } else {
+               MCD_dmaBar->taskSize1 &= ~(0xf << (15-channel)*4);
+               MCD_dmaBar->taskSize1
+                       |= (xferSize & 3) << (((15 - channel)*4) + 2);
+               MCD_dmaBar->taskSize1
+                       |= (xferSize & 3) << ((15 - channel)*4);
+       }
+
+       /* Setup task table flags/options */
+       MCD_taskTable[channel].FDTandFlags &= ~MCD_TT_FLAGS_MASK;
+       MCD_taskTable[channel].FDTandFlags |= (MCD_TT_FLAGS_MASK & flags);
+
+       if (flags & MCD_FECTX_DMA) {
+               /* TDTStart and TDTEnd */
+               MCD_taskTable[channel].TDTstart =
+                       MCD_modelTaskTable[TASK_FECTX].TDTstart;
+               MCD_taskTable[channel].TDTend =
+                       MCD_modelTaskTable[TASK_FECTX].TDTend;
+               MCD_startDmaENetXmit(srcAddr, srcAddr, destAddr,
+                               MCD_taskTable, channel);
+       } else if (flags & MCD_FECRX_DMA) {
+               /* TDTStart and TDTEnd */
+               MCD_taskTable[channel].TDTstart =
+                       MCD_modelTaskTable[TASK_FECRX].TDTstart;
+               MCD_taskTable[channel].TDTend =
+                       MCD_modelTaskTable[TASK_FECRX].TDTend;
+               MCD_startDmaENetRcv(srcAddr, srcAddr, destAddr,
+                       MCD_taskTable, channel);
+       } else if (flags & MCD_SINGLE_DMA) {
+               /*
+               * This buffer descriptor is used for storing off
+               * initial parameters for later progress query
+               * calculation and for the DMA to write the resulting
+               * checksum. The DMA does not use this to determine how
+               * to operate, that info is passed with the init routine
+               */
+               MCD_relocBuffDesc[channel].srcAddr = srcAddr;
+               MCD_relocBuffDesc[channel].destAddr = destAddr;
+               MCD_relocBuffDesc[channel].lastDestAddr = destAddr;
+               MCD_relocBuffDesc[channel].dmaSize = dmaSize;
+               MCD_relocBuffDesc[channel].flags = 0;
+               /* not used */
+               MCD_relocBuffDesc[channel].csumResult = 0;
+               /* not used */
+               MCD_relocBuffDesc[channel].next = 0;
+               /* not used */
+
+               /* Initialize the progress-querying stuff
+                * to show no progress:*/
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       SRCPTR + CSAVE_OFFSET] = (int)srcAddr;
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       DESTPTR + CSAVE_OFFSET] = (int)destAddr;
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       DCOUNT + CSAVE_OFFSET] = 0;
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       CURRBD + CSAVE_OFFSET] =
+                       (u32) &(MCD_relocBuffDesc[channel]);
+
+               if ((funcDesc == MCD_FUNC_NOEU1)
+                       || (funcDesc == MCD_FUNC_NOEU2)) {
+                       /* TDTStart and TDTEnd */
+                       MCD_taskTable[channel].TDTstart =
+                               MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart;
+                       MCD_taskTable[channel].TDTend =
+                               MCD_modelTaskTable[TASK_SINGLENOEU].TDTend;
+                       MCD_startDmaSingleNoEu(srcAddr, srcIncr, destAddr,
+                               destIncr, dmaSize, xferSizeIncr, flags,
+                               (int *)&(MCD_relocBuffDesc[channel]),
+                               cSave, MCD_taskTable, channel);
+               } else {
+                       /* TDTStart and TDTEnd */
+                       MCD_taskTable[channel].TDTstart =
+                               MCD_modelTaskTable[TASK_SINGLEEU].TDTstart;
+                       MCD_taskTable[channel].TDTend =
+                               MCD_modelTaskTable[TASK_SINGLEEU].TDTend;
+                       MCD_startDmaSingleEu(srcAddr, srcIncr, destAddr,
+                               destIncr, dmaSize, xferSizeIncr, flags,
+                               (int *)&(MCD_relocBuffDesc[channel]),
+                               cSave, MCD_taskTable, channel);
+               }
+       } else /* Chained DMA */ {
+               /* Initialize the progress-querying
+                * stuff to show no progress:*/
+#if 1 /* (!defined(MCD_NEED_ADDR_TRANS)) */
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       SRCPTR + CSAVE_OFFSET]
+                       = (int)((MCD_bufDesc *) srcAddr)->srcAddr;
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       DESTPTR + CSAVE_OFFSET]
+                       = (int)((MCD_bufDesc *) srcAddr)->destAddr;
+#else
+       /* if using address translation, need the
+        * virtual addr of the first buffdesc */
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       SRCPTR + CSAVE_OFFSET]
+                       = (int)((MCD_bufDesc *) srcAddrVirt)->srcAddr;
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       DESTPTR + CSAVE_OFFSET]
+                       = (int)((MCD_bufDesc *) srcAddrVirt)->destAddr;
+#endif
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       DCOUNT + CSAVE_OFFSET] = 0;
+               ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+                       CURRBD + CSAVE_OFFSET] = (u32) srcAddr;
+
+               if (funcDesc == MCD_FUNC_NOEU1
+                       || funcDesc == MCD_FUNC_NOEU2) {
+                       /* TDTStart and TDTEnd */
+                       MCD_taskTable[channel].TDTstart =
+                               MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart;
+                       MCD_taskTable[channel].TDTend =
+                               MCD_modelTaskTable[TASK_CHAINNOEU].TDTend;
+                       MCD_startDmaChainNoEu((int *)srcAddr, srcIncr,
+                               destIncr, xferSize, xferSizeIncr, cSave,
+                               MCD_taskTable, channel);
+               } else {
+                       /* TDTStart and TDTEnd */
+                       MCD_taskTable[channel].TDTstart =
+                               MCD_modelTaskTable[TASK_CHAINEU].TDTstart;
+                       MCD_taskTable[channel].TDTend =
+                               MCD_modelTaskTable[TASK_CHAINEU].TDTend;
+                       MCD_startDmaChainEu((int *)srcAddr, srcIncr, destIncr,
+                               xferSize, xferSizeIncr, cSave,
+                               MCD_taskTable, channel);
+               }
+       }
+
+       MCD_chStatus[channel] = MCD_IDLE;
+       return MCD_OK;
+}
+
+/************************ End of MCD_startDma() *********************/
+
+/********************************************************************/
+/* Function:    MCD_XferProgrQuery
+ * Purpose:     Returns progress of DMA on requested channel
+ * Arguments:   channel - channel to retrieve progress for
+ *              progRep - pointer to user supplied MCD_XferProg struct
+ * Returns:     MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
+ *
+ * Notes:
+ *  MCD_XferProgrQuery() upon completing or after aborting a DMA, or
+ *  while the DMA is in progress, this function returns the first
+ *  DMA-destination address not (or not yet) used in the DMA. When
+ *  encountering a non-ready buffer descriptor, the information for
+ *  the last completed descriptor is returned.
+ *
+ *  MCD_XferProgQuery() has to avoid the possibility of getting
+ *  partially-updated information in the event that we should happen
+ *  to query DMA progress just as the DMA is updating it. It does that
+ *  by taking advantage of the fact context is not saved frequently for
+ *  the most part. We therefore read it at least twice until we get the
+ *  same information twice in a row.
+ *
+ *  Because a small, but not insignificant, amount of time is required
+ *  to write out the progress-query information, especially upon
+ *  completion of the DMA, it would be wise to guarantee some time lag
+ *  between successive readings of the progress-query information.
+ */
+
+/*
+ * How many iterations of the loop below to execute to stabilize values
+ */
+#define STABTIME 0
+
+int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep)
+{
+       MCD_XferProg prevRep;
+       int again;
+       /* true if we are to try again to get consistent results */
+       int i;  /* used as a time-waste counter */
+       int destDiffBytes;
+       /* Total number of bytes that we think actually got xfered. */
+       int numIterations; /* number of iterations */
+       int bytesNotXfered; /* bytes that did not get xfered. */
+       s8 *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr;
+       int subModVal, addModVal;
+       /* Mode values to added and subtracted from the final destAddr */
+
+       if ((channel < 0) || (channel >= NCHANNELS))
+               return MCD_CHANNEL_INVALID;
+
+       /* Read a trial value for the progress-reporting values*/
+       prevRep.lastSrcAddr =
+       (s8 *)((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+               SRCPTR + CSAVE_OFFSET];
+       prevRep.lastDestAddr =
+       (s8 *)((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+               DESTPTR + CSAVE_OFFSET];
+       prevRep.dmaSize =
+       ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[
+               DCOUNT + CSAVE_OFFSET];
+       prevRep.currBufDesc =
+               (MCD_bufDesc *)((volatile int *)MCD_taskTable[
+               channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET];
+
+       /* Repeatedly reread those values until
+        * they match previous values: */
+       do {
+               /* Take a little bit of time to ensure stability: */
+               for (i = 0;  i < STABTIME;  i++)
+                       i += i >> 2;
+               /* make sure this loop does something so that it
+                doesn't get optimized out */
+               /* Check them again: */
+               progRep->lastSrcAddr =
+                       (s8 *)((volatile int *)MCD_taskTable[
+                       channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
+               progRep->lastDestAddr =
+                       (s8 *)((volatile int *)MCD_taskTable[
+                       channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
+               progRep->dmaSize = ((volatile int *)MCD_taskTable[
+                       channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET];
+               progRep->currBufDesc =
+               (MCD_bufDesc *)((volatile int *)MCD_taskTable[
+                       channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET];
+
+               /* See if they match: */
+               if (prevRep.lastSrcAddr  != progRep->lastSrcAddr
+                       || prevRep.lastDestAddr != progRep->lastDestAddr
+                       || prevRep.dmaSize      != progRep->dmaSize
+                       || prevRep.currBufDesc  != progRep->currBufDesc) {
+                       /* If they don't match, remember previous
+                       values and try again:*/
+                       prevRep.lastSrcAddr = progRep->lastSrcAddr;
+                       prevRep.lastDestAddr = progRep->lastDestAddr;
+                       prevRep.dmaSize = progRep->dmaSize;
+                       prevRep.currBufDesc = progRep->currBufDesc;
+                       again = MCD_TRUE;
+               } else
+                       again = MCD_FALSE;
+       } while (again == MCD_TRUE);
+
+
+       /* Update dmaSize and lastDestAddr */
+       switch (MCD_remVariants.remDestRsdIncr[channel]) {
+       case MINUS1:
+               subModVal = ((int)progRep->lastDestAddr)
+                       & ((MCD_remVariants.remXferSize[channel]) - 1);
+               addModVal = ((int)progRep->currBufDesc->destAddr)
+                       & ((MCD_remVariants.remXferSize[channel]) - 1);
+               LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr)
+                       - addModVal;
+               LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal;
+               destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr;
+               bytesNotXfered =
+                       (destDiffBytes/MCD_remVariants.remDestIncr[channel]) *
+                       (MCD_remVariants.remDestIncr[channel]
+                         + MCD_remVariants.remXferSize[channel]);
+               progRep->dmaSize = destDiffBytes - bytesNotXfered
+                       + addModVal - subModVal;
+               break;
+       case ZERO:
+               progRep->lastDestAddr = progRep->currBufDesc->destAddr;
+               break;
+       case PLUS1:
+               /* This value has to be subtracted
+                from the final calculated dmaSize. */
+               subModVal = ((int)progRep->currBufDesc->destAddr)
+                       & ((MCD_remVariants.remXferSize[channel]) - 1);
+               /* These bytes are already in lastDestAddr. */
+               addModVal = ((int)progRep->lastDestAddr)
+                       & ((MCD_remVariants.remXferSize[channel]) - 1);
+               LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr)
+                       - subModVal;
+               LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal;
+               destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr);
+               numIterations = (LWAlignedCurrDestAddr -
+               LWAlignedInitDestAddr)/MCD_remVariants.remDestIncr[channel];
+               bytesNotXfered =  numIterations *
+                       (MCD_remVariants.remDestIncr[channel]
+                        - MCD_remVariants.remXferSize[channel]);
+               progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal;
+               break;
+       default:
+               break;
+       }
+
+       /* This covers M1,P1,Z for source */
+       switch (MCD_remVariants.remSrcRsdIncr[channel]) {
+       case MINUS1:
+               progRep->lastSrcAddr =
+                       progRep->currBufDesc->srcAddr +
+                       (MCD_remVariants.remSrcIncr[channel] *
+                (progRep->dmaSize/MCD_remVariants.remXferSize[channel]));
+               break;
+       case ZERO:
+               progRep->lastSrcAddr = progRep->currBufDesc->srcAddr;
+               break;
+       case PLUS1:
+               progRep->lastSrcAddr =
+                       progRep->currBufDesc->srcAddr +
+                       (MCD_remVariants.remSrcIncr[channel] *
+                (progRep->dmaSize/MCD_remVariants.remXferSize[channel]));
+               break;
+       default:
+               break;
+       }
+
+       return MCD_OK;
+}
+/******************* End of MCD_XferProgrQuery() ********************/
+
+/********************************************************************/
+/* MCD_resmActions() does the majority of the actions of a DMA resume.
+ * It is called from MCD_killDma() and MCD_resumeDma().  It has to be
+ * a separate function because the kill function has to negate the task
+ * enable before resuming it, but the resume function has to do nothing
+ * if there is no DMA on that channel (i.e., if the enable bit is 0).
+ */
+static void MCD_resmActions(int channel)
+{
+       MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
+       MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus;
+
+       /* Determine which initiators are asserted */
+       MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
+
+       if ((MCD_dmaBar->ptdDebug >> channel) & 0x1)
+               MCD_chStatus[channel] = MCD_RUNNING;
+       else
+               MCD_chStatus[channel] = MCD_IDLE;
+}
+/********************* End of MCD_resmActions() *********************/
+
+/********************************************************************/
+/* Function:    MCD_killDma
+ * Purpose:     Halt the DMA on the requested channel, without any
+ *              intention of resuming the DMA.
+ * Arguments:   channel - requested channel
+ * Returns:     MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
+ *
+ * Notes:
+ *  A DMA may be killed from any state, including paused state, and it
+ *  always goes to the MCD_HALTED state even if it is killed while in
+ *  the MCD_NO_DMA or MCD_IDLE states.
+ */
+int MCD_killDma(int channel)
+{
+       if ((channel < 0) || (channel >= NCHANNELS))
+               return MCD_CHANNEL_INVALID;
+
+       MCD_dmaBar->taskControl[channel] = 0x0;
+
+       /* Clean up after a paused task */
+       if (MCD_chStatus[channel] == MCD_PAUSED) {
+               MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
+               MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus;
+       }
+
+       MCD_chStatus[channel] = MCD_HALTED;
+
+       return MCD_OK;
+}
+/************************ End of MCD_killDma() **********************/
+
+/********************************************************************/
+/* Function:    MCD_continDma
+ * Purpose:     Continue a DMA which as stopped due to encountering an
+ *              unready buffer descriptor.
+ * Arguments:   channel - channel to continue the DMA on
+ * Returns:     MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
+ *
+ * Notes:
+ *  This routine does not check to see if there is a task which can
+ *  be continued. Also this routine should not be used with single DMAs.
+ */
+int MCD_continDma(int channel)
+{
+       if ((channel < 0) || (channel >= NCHANNELS))
+               return MCD_CHANNEL_INVALID;
+
+       MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN;
+       MCD_chStatus[channel] = MCD_RUNNING;
+
+       return MCD_OK;
+}
+/********************** End of MCD_continDma() **********************/
+
+/*********************************************************************
+ * MCD_pauseDma() and MCD_resumeDma() below use the DMA's debug unit
+ * to freeze a task and resume it.  We freeze a task by breakpointing
+ * on the stated task.  That is, not any specific place in the task,
+ * but any time that task executes.  In particular, when that task
+ * executes, we want to freeze that task and only that task.
+ *
+ * The bits of the debug control register influence interrupts vs.
+ * breakpoints as follows:
+ * - Bits 14 and 0 enable or disable debug functions.  If enabled, you
+ *   will get the interrupt but you may or may not get a breakpoint.
+ * - Bits 2 and 1 decide whether you also get a breakpoint in addition
+ *   to an interrupt.
+ *
+ * The debug unit can do these actions in response to either internally
+ * detected breakpoint conditions from the comparators, or in response
+ * to the external breakpoint pin, or both.
+ * - Bits 14 and 1 perform the above-described functions for
+ *   internally-generated conditions, i.e., the debug comparators.
+ * - Bits 0 and 2 perform the above-described functions for external
+ *   conditions, i.e., the breakpoint external pin.
+ *
+ * Note that, although you "always" get the interrupt when you turn
+ * the debug functions, the interrupt can nevertheless, if desired, be
+ * masked by the corresponding bit in the PTD's IMR. Note also that
+ * this means that bits 14 and 0 must enable debug functions before
+ * bits 1 and 2, respectively, have any effect.
+ *
+ * NOTE: It's extremely important to not pause more than one DMA channel
+ *  at a time.
+ ********************************************************************/
+
+/********************************************************************/
+/* Function:    MCD_pauseDma
+ * Purpose:     Pauses the DMA on a given channel (if any DMA is running
+ *              on that channel).
+ * Arguments:   channel
+ * Returns:     MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
+ */
+int MCD_pauseDma(int channel)
+{
+       if ((channel < 0) || (channel >= NCHANNELS))
+               return MCD_CHANNEL_INVALID;
+
+       if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) {
+               MCD_dmaBar->debugComp1 = channel;
+               MCD_dmaBar->debugControl =
+                       DBG_CTL_ENABLE | (1 << (channel + 16));
+               MCD_chStatus[channel] = MCD_PAUSED;
+       }
+
+       return MCD_OK;
+}
+/************************* End of MCD_pauseDma() ********************/
+
+/********************************************************************/
+/* Function:    MCD_resumeDma
+ * Purpose:     Resumes the DMA on a given channel (if any DMA is
+ *              running on that channel).
+ * Arguments:   channel - channel on which to resume DMA
+ * Returns:     MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
+ */
+int MCD_resumeDma(int channel)
+{
+       if ((channel < 0) || (channel >= NCHANNELS))
+               return MCD_CHANNEL_INVALID;
+
+       if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN)
+               MCD_resmActions(channel);
+
+    return MCD_OK;
+}
+/************************ End of MCD_resumeDma() ********************/
+
+/********************************************************************/
+/* Function:    MCD_csumQuery
+ * Purpose:     Provide the checksum after performing a non-chained DMA
+ * Arguments:   channel - channel to report on
+ *              csum - pointer to where to write the checksum/CRC
+ * Returns:     MCD_ERROR if the channel is invalid, else MCD_OK
+ *
+ * Notes:
+ *
+ */
+int MCD_csumQuery(int channel, u32 *csum)
+{
+#ifdef MCD_INCLUDE_EU
+       if ((channel < 0) || (channel >= NCHANNELS))
+               return MCD_CHANNEL_INVALID;
+
+       *csum = MCD_relocBuffDesc[channel].csumResult;
+       return MCD_OK;
+#else
+       return MCD_ERROR;
+#endif
+}
+/*********************** End of MCD_resumeDma() *********************/
+
+/********************************************************************/
+/* Function:    MCD_getCodeSize
+ * Purpose:     Provide the size requirements of the microcoded tasks
+ * Returns:     Size in bytes
+ */
+int MCD_getCodeSize(void)
+{
+#ifdef MCD_INCLUDE_EU
+       return 0x2b64;
+#else
+       return 0x1744;
+#endif
+}
+/********************** End of MCD_getCodeSize() ********************/
+
+/********************************************************************/
+/* Function:    MCD_getVersion
+ * Purpose:     Provide the version string and number
+ * Arguments:   longVersion - user supplied pointer to a pointer to a char
+ *                    which points to the version string
+ * Returns:     Version number and version string (by reference)
+ */
+char MCD_versionString[] = "Multi-channel DMA API v1.0";
+#define MCD_REV_MAJOR   0x01
+#define MCD_REV_MINOR   0x00
+
+int MCD_getVersion(char **longVersion)
+{
+       int ret = 0;
+       *longVersion = MCD_versionString;
+       ret = (MCD_REV_MAJOR << 8) | MCD_REV_MINOR;
+       return ret;
+}
+/********************** End of MCD_getVersion() *********************/
+
+/********************************************************************/
+/* Private version of memcpy()
+ * Note that everything this is used for is longword-aligned.
+ */
+static void MCD_memcpy(int *dest, int *src, u32 size)
+{
+       u32 i;
+
+       for (i = 0;  i < size;  i += sizeof(int), dest++, src++)
+               *dest = *src;
+}
+/********************************************************************/
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_progCheck.h b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_progCheck.h
new file mode 100644 (file)
index 0000000..136f4df
--- /dev/null
@@ -0,0 +1,29 @@
+/*
+ * drivers/dma/MCD_progCheck.h
+ *
+ * Copyright (C) 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Kurt Mahan <kmahan@freescale.com>
+ * Shrek Wu b16972@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* This file is autogenerated. Do not change */
+
+#define CURRBD 4
+#define DCOUNT 6
+#define DESTPTR 5
+#define SRCPTR 7
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasks.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasks.c
new file mode 100644 (file)
index 0000000..00b4b35
--- /dev/null
@@ -0,0 +1,2466 @@
+/*
+ * drivers/dma/MCD_tasks.c
+ *
+ * Copyright (C) 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Kurt Mahan <kmahan@freescale.com>
+ * Shrek Wu b16972@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include "MCD_dma.h"
+
+u32 MCD_varTab0[];
+u32 MCD_varTab1[];
+u32 MCD_varTab2[];
+u32 MCD_varTab3[];
+u32 MCD_varTab4[];
+u32 MCD_varTab5[];
+u32 MCD_varTab6[];
+u32 MCD_varTab7[];
+u32 MCD_varTab8[];
+u32 MCD_varTab9[];
+u32 MCD_varTab10[];
+u32 MCD_varTab11[];
+u32 MCD_varTab12[];
+u32 MCD_varTab13[];
+u32 MCD_varTab14[];
+u32 MCD_varTab15[];
+
+u32 MCD_funcDescTab0[];
+#ifdef MCD_INCLUDE_EU
+u32 MCD_funcDescTab1[];
+u32 MCD_funcDescTab2[];
+u32 MCD_funcDescTab3[];
+u32 MCD_funcDescTab4[];
+u32 MCD_funcDescTab5[];
+u32 MCD_funcDescTab6[];
+u32 MCD_funcDescTab7[];
+u32 MCD_funcDescTab8[];
+u32 MCD_funcDescTab9[];
+u32 MCD_funcDescTab10[];
+u32 MCD_funcDescTab11[];
+u32 MCD_funcDescTab12[];
+u32 MCD_funcDescTab13[];
+u32 MCD_funcDescTab14[];
+u32 MCD_funcDescTab15[];
+#endif
+
+u32 MCD_contextSave0[];
+u32 MCD_contextSave1[];
+u32 MCD_contextSave2[];
+u32 MCD_contextSave3[];
+u32 MCD_contextSave4[];
+u32 MCD_contextSave5[];
+u32 MCD_contextSave6[];
+u32 MCD_contextSave7[];
+u32 MCD_contextSave8[];
+u32 MCD_contextSave9[];
+u32 MCD_contextSave10[];
+u32 MCD_contextSave11[];
+u32 MCD_contextSave12[];
+u32 MCD_contextSave13[];
+u32 MCD_contextSave14[];
+u32 MCD_contextSave15[];
+
+u32 MCD_realTaskTableSrc[] =
+{
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab0,   /* Task 0 Variable Table */
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave0,  /* Task 0 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab1,   /* Task 1 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab1,  /* Task 1 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave1,  /* Task 1 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab2,   /* Task 2 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab2,  /* Task 2 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave2,  /* Task 2 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab3,   /* Task 3 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab3,  /* Task 3 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave3,  /* Task 3 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab4,   /* Task 4 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab4,  /* Task 4 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave4,  /* Task 4 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab5,   /* Task 5 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab5,  /* Task 5 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave5,  /* Task 5 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab6,   /* Task 6 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab6,  /* Task 6 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave6,  /* Task 6 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab7,   /* Task 7 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab7,  /* Task 7 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave7,  /* Task 7 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab8,   /* Task 8 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab8,  /* Task 8 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave8,  /* Task 8 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab9,   /* Task 9 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab9,  /* Task 9 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave9,  /* Task 9 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab10,  /* Task 10 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave10, /* Task 10 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab11,  /* Task 11 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave11, /* Task 11 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab12,  /* Task 12 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave12, /* Task 12 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab13,  /* Task 13 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave13, /* Task 13 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab14,  /* Task 14 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave14, /* Task 14 context save space */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_varTab15,  /* Task 15 Variable Table */
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */
+#else
+    (u32)MCD_funcDescTab0,  /* Task 0 Function Descriptor Table & Flags */
+#endif
+    0x00000000,
+    0x00000000,
+    (u32)MCD_contextSave15, /* Task 15 context save space */
+    0x00000000,
+};
+
+
+u32 MCD_varTab0[] =
+{   /* Task 0 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+
+u32 MCD_varTab1[] =
+{   /* Task 1 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab2[] =
+{   /* Task 2 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab3[] =
+{   /* Task 3 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab4[] =
+{   /* Task 4 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab5[] =
+{   /* Task 5 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab6[] =
+{   /* Task 6 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab7[] =
+{   /* Task 7 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab8[] =
+{   /* Task 8 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab9[] =
+{   /* Task 9 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab10[] =
+{   /* Task 10 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab11[] =
+{   /* Task 11 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab12[] =
+{   /* Task 12 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab13[] =
+{   /* Task 13 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab14[] =
+{   /* Task 14 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_varTab15[] =
+{   /* Task 15 Variable Table */
+    0x00000000, /* var[0] */
+    0x00000000, /* var[1] */
+    0x00000000, /* var[2] */
+    0x00000000, /* var[3] */
+    0x00000000, /* var[4] */
+    0x00000000, /* var[5] */
+    0x00000000, /* var[6] */
+    0x00000000, /* var[7] */
+    0x00000000, /* var[8] */
+    0x00000000, /* var[9] */
+    0x00000000, /* var[10] */
+    0x00000000, /* var[11] */
+    0x00000000, /* var[12] */
+    0x00000000, /* var[13] */
+    0x00000000, /* var[14] */
+    0x00000000, /* var[15] */
+    0x00000000, /* var[16] */
+    0x00000000, /* var[17] */
+    0x00000000, /* var[18] */
+    0x00000000, /* var[19] */
+    0x00000000, /* var[20] */
+    0x00000000, /* var[21] */
+    0x00000000, /* var[22] */
+    0x00000000, /* var[23] */
+    0xe0000000, /* inc[0] */
+    0x20000000, /* inc[1] */
+    0x2000ffff, /* inc[2] */
+    0x00000000, /* inc[3] */
+    0x00000000, /* inc[4] */
+    0x00000000, /* inc[5] */
+    0x00000000, /* inc[6] */
+    0x00000000, /* inc[7] */
+};
+
+u32 MCD_funcDescTab0[] =
+{   /* Task 0 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+#ifdef MCD_INCLUDE_EU
+u32 MCD_funcDescTab1[] =
+{   /* Task 1 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab2[] =
+{   /* Task 2 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab3[] =
+{   /* Task 3 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab4[] =
+{   /* Task 4 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab5[] =
+{   /* Task 5 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab6[] =
+{   /* Task 6 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab7[] =
+{   /* Task 7 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab8[] =
+{   /* Task 8 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab9[] =
+{   /* Task 9 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab10[] =
+{   /* Task 10 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab11[] =
+{   /* Task 11 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab12[] =
+{   /* Task 12 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab13[] =
+{   /* Task 13 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab14[] =
+{   /* Task 14 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+
+u32 MCD_funcDescTab15[] =
+{   /* Task 15 Function Descriptor Table */
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0xa0045670, /* mainFunc(), EU# 3 */
+    0xa0000000, /* rsduFunc(), EU# 3 */
+    0xa0000000, /* crcAccumVal(), EU# 3 */
+    0x20000000, /* setCrcAccum(), EU# 3 */
+    0x21800000, /* and(), EU# 3 */
+    0x21e00000, /* or(), EU# 3 */
+    0x20400000, /* add(), EU# 3 */
+    0x20500000, /* sub(), EU# 3 */
+    0x205a0000, /* andNot(), EU# 3 */
+    0x20a00000, /* shiftR(), EU# 3 */
+    0x202fa000, /* andReadyBit(), EU# 3 */
+    0x202f9000, /* andNotReadyBit(), EU# 3 */
+    0x202ea000, /* andWrapBit(), EU# 3 */
+    0x202da000, /* andLastBit(), EU# 3 */
+    0x202e2000, /* andInterruptBit(), EU# 3 */
+    0x202f2000, /* andCrcRestartBit(), EU# 3 */
+};
+#endif /*MCD_INCLUDE_EU*/
+
+u32 MCD_contextSave0[128];  /* Task 0 context save space */
+u32 MCD_contextSave1[128];  /* Task 1 context save space */
+u32 MCD_contextSave2[128];  /* Task 2 context save space */
+u32 MCD_contextSave3[128];  /* Task 3 context save space */
+u32 MCD_contextSave4[128];  /* Task 4 context save space */
+u32 MCD_contextSave5[128];  /* Task 5 context save space */
+u32 MCD_contextSave6[128];  /* Task 6 context save space */
+u32 MCD_contextSave7[128];  /* Task 7 context save space */
+u32 MCD_contextSave8[128];  /* Task 8 context save space */
+u32 MCD_contextSave9[128];  /* Task 9 context save space */
+u32 MCD_contextSave10[128]; /* Task 10 context save space */
+u32 MCD_contextSave11[128]; /* Task 11 context save space */
+u32 MCD_contextSave12[128]; /* Task 12 context save space */
+u32 MCD_contextSave13[128]; /* Task 13 context save space */
+u32 MCD_contextSave14[128]; /* Task 14 context save space */
+u32 MCD_contextSave15[128]; /* Task 15 context save space */
+
+u32 MCD_ChainNoEu_TDT[];
+u32 MCD_SingleNoEu_TDT[];
+#ifdef MCD_INCLUDE_EU
+u32 MCD_ChainEu_TDT[];
+u32 MCD_SingleEu_TDT[];
+#endif
+u32 MCD_ENetRcv_TDT[];
+u32 MCD_ENetXmit_TDT[];
+
+u32 MCD_modelTaskTableSrc[] =
+{
+    (u32)MCD_ChainNoEu_TDT,
+    (u32)&((u8 *)MCD_ChainNoEu_TDT)[0x0000016c],
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_SingleNoEu_TDT,
+    (u32)&((u8 *)MCD_SingleNoEu_TDT)[0x000000d4],
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+#ifdef MCD_INCLUDE_EU
+    (u32)MCD_ChainEu_TDT,
+    (u32)&((u8 *)MCD_ChainEu_TDT)[0x000001b4],
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_SingleEu_TDT,
+    (u32)&((u8 *)MCD_SingleEu_TDT)[0x00000124],
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+#endif
+    (u32)MCD_ENetRcv_TDT,
+    (u32)&((u8 *)MCD_ENetRcv_TDT)[0x000000a4],
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    (u32)MCD_ENetXmit_TDT,
+    (u32)&((u8 *)MCD_ENetXmit_TDT)[0x000000d0],
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+};
+u32 MCD_ChainNoEu_TDT[] =
+{
+    0x80004000,
+    0x8118801b,
+    0xb8c60018,
+    0x10002b10,
+    0x7000000d,
+    0x018cf89f,
+    0x6000000a,
+    0x080cf89f,
+    0x000001f8,
+    0x98180364,
+    0x8118801b,
+    0xf8c6001a,
+    0xb8c6601b,
+    0x10002710,
+    0x00000f18,
+    0xb8c6001d,
+    0x10001310,
+    0x60000007,
+    0x014cf88b,
+    0x98c6001c,
+    0x00000710,
+    0x98c70018,
+    0x10001f10,
+    0x0000c818,
+    0x000001f8, /* 0060(:0):      NOP */
+    0xc1476018,
+    0xc003231d,
+    0x811a601b,
+    0xc1862102,
+    0x849be009,
+    0x03fed7b8,
+    0xda9b001b,
+    0x9b9be01b,
+    0x1000cb20,
+    0x70000006,
+    0x088cf88f,
+    0x1000cb28,
+    0x70000006,
+    0x088cf88f,
+    0x1000cb30,
+    0x70000006,
+    0x088cf88f,
+    0x1000cb38,
+    0x0000c728,
+    0x000001f8, /* 00B0(:0):      NOP */
+    0xc1476018,
+    0xc003241d,
+    0x811a601b,
+    0xda9b001b,
+    0x9b9be01b,
+    0x0000d3a0,
+    0xc1862102,
+    0x849be009,
+    0x0bfed7b8,
+    0xda9b001b,
+    0x9b9be01b,
+    0x1000cb20,
+    0x70000006,
+    0x088cf88f,
+    0x1000cb28,
+    0x70000006,
+    0x088cf88f,
+    0x1000cb30,
+    0x70000006,
+    0x088cf88f,
+    0x1000cb38,
+    0x0000c728,
+    0x000001f8, /* 010C(:0):      NOP */
+    0x8118801b,
+    0xd8c60018,
+    0x98c6601c,
+    0x6000000b,
+    0x0c8cfc9f,
+    0x000001f8, /* 0124(:0):      NOP */
+    0xa146001e,
+    0x10000b08,
+    0x10002050,
+    0xb8c60018,
+    0x10002b10,
+    0x7000000a,
+    0x080cf89f,
+    0x6000000d,
+    0x018cf89f,
+    0x000001f8, /* 014C(:0):      NOP */
+    0x8618801b,
+    0x7000000e,
+    0x084cf21f,
+    0xd8990336,
+    0x8019801b,
+    0x040001f8,
+    0x000001f8, /* 0168(:0):      NOP */
+    0x000001f8, /* 016C(:0):    NOP */
+};
+u32 MCD_SingleNoEu_TDT[] =
+{
+    0x8198001b,
+    0x7000000d,
+    0x080cf81f,
+    0x8198801b,
+    0x6000000e,
+    0x084cf85f,
+    0x000001f8, /* 0018(:0):    NOP */
+    0x8298001b,
+    0x7000000d,
+    0x010cf81f,
+    0x6000000e,
+    0x018cf81f,
+    0xc202601b,
+    0xc002221c,
+    0x809a601b,
+    0xc10420c2,
+    0x839be009,
+    0x03fed7b8,
+    0xda9b001b,
+    0x9b9be01b,
+    0x70000006,
+    0x088cf889,
+    0x1000cb28,
+    0x70000006,
+    0x088cf889,
+    0x1000cb30,
+    0x70000006,
+    0x088cf889,
+    0x0000cb38,
+    0x000001f8, /* 0074(:0):    NOP */
+    0xc202601b,
+    0xc002229c,
+    0x809a601b,
+    0xda9b001b,
+    0x9b9be01b,
+    0x0000d3a0,
+    0xc10420c2,
+    0x839be009,
+    0x0bfed7b8,
+    0xda9b001b,
+    0x9b9be01b,
+    0x70000006,
+    0x088cf889,
+    0x1000cb28,
+    0x70000006,
+    0x088cf889,
+    0x1000cb30,
+    0x70000006,
+    0x088cf889,
+    0x0000cb38,
+    0x000001f8, /* 00C8(:0):    NOP */
+    0xc318022d,
+    0x8018801b,
+    0x040001f8,
+};
+#ifdef MCD_INCLUDE_EU
+u32 MCD_ChainEu_TDT[] =
+{
+    0x80004000,
+    0x8198801b,
+    0xb8c68018,
+    0x10002f10,
+    0x7000000d,
+    0x01ccf89f,
+    0x6000000a,
+    0x080cf89f,
+    0x000001f8,
+    0x981803a4,
+    0x8198801b,
+    0xf8c6801a,
+    0xb8c6e01b,
+    0x10002b10,
+    0x00001318,
+    0xb8c6801d,
+    0x10001710,
+    0x60000007,
+    0x018cf88c,
+    0x98c6801c,
+    0x00000b10,
+    0x98c78018,
+    0x10002310,
+    0x0000c820,
+    0x000001f8, /* 0060(:0):      NOP */
+    0x8698801b,
+    0x7000000f,
+    0x084cf2df,
+    0xd899042d,
+    0x8019801b,
+    0x60000003,
+    0x2cd7c7df, /* 007C(:979):        DRD2B2: EU3(var13)  */
+    0xd8990364,
+    0x8019801b,
+    0x60000003,
+    0x2c17c7df, /* 008C(:981):        DRD2B2: EU3(var1)  */
+    0x000001f8, /* 0090(:0):      NOP */
+    0xc1c7e018,
+    0xc003a35e,
+    0x819a601b,
+    0xc206a142,
+    0x851be009,
+    0x63fe0000,
+    0x0d4cfddf,
+    0xda9b001b,
+    0x9b9be01b,
+    0x70000002,
+    0x004cf81f,
+    0x1000cb20,
+    0x70000006,
+    0x088cf891,
+    0x1000cb28,
+    0x70000006,
+    0x088cf891,
+    0x1000cb30,
+    0x70000006,
+    0x088cf891,
+    0x1000cb38,
+    0x0000c728,
+    0x000001f8, /* 00EC(:0):      NOP */
+    0xc1c7e018,
+    0xc003a49e,
+    0x819a601b,
+    0xda9b001b,
+    0x9b9be01b,
+    0x0000d3a0,
+    0xc206a142,
+    0x851be009,
+    0x6bfe0000,
+    0x0d4cfddf,
+    0xda9b001b,
+    0x9b9be01b,
+    0x70000002,
+    0x004cf81f,
+    0x1000cb20,
+    0x70000006,
+    0x088cf891,
+    0x1000cb28,
+    0x70000006,
+    0x088cf891,
+    0x1000cb30,
+    0x70000006,
+    0x088cf891,
+    0x1000cb38,
+    0x0000c728,
+    0x000001f8, /* 0154(:0):      NOP */
+    0x8198801b,
+    0xd8c68018,
+    0x98c6e01c,
+    0x6000000b,
+    0x0c8cfc9f,
+    0x0000cc08,
+    0xa1c6801e,
+    0x10000f08,
+    0x10002458,
+    0xb8c68018,
+    0x10002f10,
+    0x7000000a,
+    0x080cf89f,
+    0x6000000d,
+    0x01ccf89f,
+    0x000001f8, /* 0194(:0):      NOP */
+    0x8698801b,
+    0x7000000e,
+    0x084cf25f,
+    0xd899037f,
+    0x8019801b,
+    0x040001f8,
+    0x000001f8, /* 01B0(:0):      NOP */
+    0x000001f8, /* 01B4(:0):    NOP */
+};
+u32 MCD_SingleEu_TDT[] =
+{
+    0x8218001b,
+    0x7000000d,
+    0x080cf81f,
+    0x8218801b,
+    0x6000000e,
+    0x084cf85f,
+    0x000001f8, /* 0018(:0):    NOP */
+    0x8318001b,
+    0x7000000d,
+    0x014cf81f,
+    0x6000000e,
+    0x01ccf81f,
+    0x8498001b,
+    0x7000000f,
+    0x080cf19f,
+    0xd81882a4,
+    0x8019001b,
+    0x60000003,
+    0x2c97c7df,
+    0xd818826d,
+    0x8019001b,
+    0x60000003,
+    0x2c17c7df,
+    0x000001f8, /* 005C(:0):    NOP */
+    0xc282e01b,
+    0xc002a25e,
+    0x811a601b,
+    0xc184a102,
+    0x841be009,
+    0x63fe0000,
+    0x0d4cfddf,
+    0xda9b001b,
+    0x9b9be01b,
+    0x70000002,
+    0x004cf99f,
+    0x70000006,
+    0x088cf88b,
+    0x1000cb28,
+    0x70000006,
+    0x088cf88b,
+    0x1000cb30,
+    0x70000006,
+    0x088cf88b,
+    0x0000cb38,
+    0x000001f8, /* 00B0(:0):    NOP */
+    0xc282e01b,
+    0xc002a31e,
+    0x811a601b,
+    0xda9b001b,
+    0x9b9be01b,
+    0x0000d3a0,
+    0xc184a102,
+    0x841be009,
+    0x6bfe0000,
+    0x0d4cfddf,
+    0xda9b001b,
+    0x9b9be01b,
+    0x70000002,
+    0x004cf99f,
+    0x70000006,
+    0x088cf88b,
+    0x1000cb28,
+    0x70000006,
+    0x088cf88b,
+    0x1000cb30,
+    0x70000006,
+    0x088cf88b,
+    0x0000cb38,
+    0x000001f8, /* 0110(:0):    NOP */
+    0x8144801c,
+    0x0000c008,
+    0xc398027f,
+    0x8018801b,
+    0x040001f8,
+};
+#endif
+u32 MCD_ENetRcv_TDT[] =
+{
+    0x80004000,
+    0x81988000,
+    0x10000788,
+    0x6000000a,
+    0x080cf05f,
+    0x98180209,
+    0x81c40004,
+    0x7000000e,
+    0x010cf05f,
+    0x7000000c,
+    0x01ccf05f,
+    0x70000004,
+    0x014cf049,
+    0x70000004,
+    0x004cf04a,
+    0x00000b88,
+    0xc4030150,
+    0x8119e012,
+    0x03e0cf90,
+    0x81188000,
+    0x000ac788,
+    0xc4030000,
+    0x8199e000,
+    0x63e00004,
+    0x084cfc8b,
+    0xd8990000,
+    0x9999e000,
+    0x60000005,
+    0x0cccf841,
+    0x81c60000,
+    0xc399021b,
+    0x80198000,
+    0x00008400,
+    0x00000f08,
+    0x81988000,
+    0x10000788,
+    0x6000000a,
+    0x080cf05f,
+    0xc2188209,
+    0x80190000,
+    0x040001f8,
+    0x000001f8,
+};
+u32 MCD_ENetXmit_TDT[] =
+{
+    0x80004000,
+    0x81988000,
+    0x10000788,
+    0x6000000a,
+    0x080cf05f,
+    0x98180309,
+    0x80004003,
+    0x81c60004,
+    0x7000000e,
+    0x014cf05f,
+    0x7000000c,
+    0x028cf05f,
+    0x7000000d,
+    0x018cf05f,
+    0x70000004,
+    0x01ccf04d,
+    0x10000b90,
+    0x60000004,
+    0x020cf0a1,
+    0xc3188312,
+    0x83c70000,
+    0x00001f10,
+    0xc583a3c3,
+    0x81042325,
+    0x03e0c798,
+    0xd8990000,
+    0x9999e000,
+    0x000acf98,
+    0xd8992306,
+    0x9999e03f,
+    0x03eac798,
+    0xd8990000,
+    0x9999e000,
+    0x000acf98,
+    0xd8990000,
+    0x99832302,
+    0x0beac798,
+    0x81988000,
+    0x6000000b,
+    0x0c4cfc5f,
+    0x81c80000,
+    0xc5190312,
+    0x80198000,
+    0x00008400,
+    0x00000f08,
+    0x81988000,
+    0x10000788,
+    0x6000000a,
+    0x080cf05f,
+    0xc2988309,
+    0x80190000,
+    0x040001f8,
+    0x000001f8,
+};
+
+#ifdef MCD_INCLUDE_EU
+MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
+#endif
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasksInit.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasksInit.c
new file mode 100644 (file)
index 0000000..f9b46bc
--- /dev/null
@@ -0,0 +1,275 @@
+/*
+ * drivers/dma/MCD_tasksInit.c
+ *
+ * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Kurt Mahan <kmahan@freescale.com>
+ * Shrek Wu b16972@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Autogenerated - Do not edit!
+ */
+
+#include "MCD_dma.h"
+
+extern dmaRegs *MCD_dmaBar;
+
+
+/*
+ * Task 0
+ */
+
+void  MCD_startDmaChainNoEu(int *currBD, short srcIncr,
+       short destIncr, int xferSize, short xferSizeIncr,
+       int *cSave, volatile TaskTableEntry *taskTable,
+       int channel)
+{
+
+    MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
+       MCD_SET_VAR(taskTable+channel, 25,
+               (u32)(0xe000 << 16) | (0xffff & srcIncr));
+       /* inc[1] */
+       MCD_SET_VAR(taskTable+channel, 24,
+               (u32)(0xe000 << 16) | (0xffff & destIncr));
+       /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize);  /* var[11] */
+       MCD_SET_VAR(taskTable+channel, 26,
+               (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));
+       /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000);    /* inc[6] */
+
+    /* Set the task's Enable bit in its Task Control Register */
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
+}
+
+
+/*
+ * Task 1
+ */
+
+void  MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr,
+       char *destAddr, short destIncr, int dmaSize,
+       short xferSizeIncr, int flags, int *currBD, int *cSave,
+       volatile TaskTableEntry *taskTable, int channel)
+{
+
+    MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr);    /* var[7] */
+       MCD_SET_VAR(taskTable+channel, 25,
+               (u32)(0xe000 << 16) | (0xffff & srcIncr));
+       /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr);   /* var[2] */
+       MCD_SET_VAR(taskTable+channel, 24,
+               (u32)(0xe000 << 16) | (0xffff & destIncr));
+       /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize);    /* var[3] */
+       MCD_SET_VAR(taskTable+channel, 26,
+               (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));
+       /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)flags);  /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000);    /* inc[5] */
+
+    /* Set the task's Enable bit in its Task Control Register */
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
+}
+
+
+/*
+ * Task 2
+ */
+
+void  MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,
+       int xferSize, short xferSizeIncr, int *cSave,
+       volatile TaskTableEntry *taskTable, int channel)
+{
+
+       MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+       MCD_SET_VAR(taskTable+channel, 25,
+               (u32)(0xe000 << 16) | (0xffff & srcIncr));
+       /* inc[1] */
+       MCD_SET_VAR(taskTable+channel, 24,
+               (u32)(0xe000 << 16) | (0xffff & destIncr));
+       /* inc[0] */
+       MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize);
+       /* var[12] */
+       MCD_SET_VAR(taskTable+channel, 26,
+               (u32)(0x2000 << 16) | (0xffff & xferSizeIncr));
+       /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004);    /* var[17] */
+    MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000);    /* var[18] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000);    /* inc[7] */
+
+    /* Set the task's Enable bit in its Task Control Register */
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
+}
+
+
+/*
+ * Task 3
+ */
+
+void  MCD_startDmaSingleEu(char *srcAddr, short srcIncr,
+       char *destAddr, short destIncr, int dmaSize,
+       short xferSizeIncr, int flags, int *currBD, int *cSave,
+       volatile TaskTableEntry *taskTable, int channel)
+{
+
+    MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr);    /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 25,
+       (u32)(0xe000 << 16) | (0xffff & srcIncr));   /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr);   /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 24,
+       (u32)(0xe000 << 16) | (0xffff & destIncr));  /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize);    /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 26,
+       (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)flags);  /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 0, (u32)cSave);  /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000);    /* inc[7] */
+
+    /* Set the task's Enable bit in its Task Control Register */
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
+}
+
+
+/*
+ * Task 4
+ */
+
+void  MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr,
+       volatile TaskTableEntry *taskTable, int channel)
+{
+
+    MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff);    /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000);    /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000);    /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004);    /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000);    /* inc[3] */
+
+    /* Set the task's Enable bit in its Task Control Register */
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
+}
+
+
+/*
+ * Task 5
+ */
+
+void  MCD_startDmaENetXmit(char *bDBase, char *currBD,
+       char *xmitFifoPtr, volatile TaskTableEntry *taskTable,
+       int channel)
+{
+
+    MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
+    MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
+    MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr);   /* var[11] */
+    MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
+    MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
+    MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
+    MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
+    MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
+    MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
+    MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
+    MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
+    MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000);    /* var[10] */
+    MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000);    /* var[12] */
+    MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff);    /* var[13] */
+    MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff);    /* var[14] */
+    MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004);    /* var[15] */
+    MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008);    /* var[16] */
+    MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000);    /* inc[0] */
+    MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000);    /* inc[1] */
+    MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000);    /* inc[2] */
+    MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc);    /* inc[3] */
+    MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004);    /* inc[4] */
+    MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000);    /* inc[5] */
+    MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff);    /* inc[6] */
+    MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001);    /* inc[7] */
+
+    /* Set the task's Enable bit in its Task Control Register */
+    MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
+}
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasksInit.h b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/MCD_tasksInit.h
new file mode 100644 (file)
index 0000000..14fac25
--- /dev/null
@@ -0,0 +1,84 @@
+/*
+ * drivers/dma/MCD_tasksInit.h
+ *
+ * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Kurt Mahan <kmahan@freescale.com>
+ * Shrek Wu b16972@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef MCD_TSK_INIT_H
+#define MCD_TSK_INIT_H 1
+
+/*
+ * Autogenerated - Do not edit!
+ */
+
+/*
+ * Task 0
+ */
+void  MCD_startDmaChainNoEu(int *currBD, short srcIncr,
+               short destIncr, int xferSize,
+               short xferSizeIncr, int *cSave,
+               volatile TaskTableEntry *taskTable,
+               int channel);
+
+
+/*
+ * Task 1
+ */
+void  MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr,
+               char *destAddr, short destIncr, int dmaSize,
+               short xferSizeIncr, int flags, int *currBD,
+               int *cSave, volatile TaskTableEntry *taskTable,
+               int channel);
+
+
+/*
+ * Task 2
+ */
+void  MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,
+               int xferSize, short xferSizeIncr, int *cSave,
+               volatile TaskTableEntry *taskTable,
+               int channel);
+
+
+/*
+ * Task 3
+ */
+void  MCD_startDmaSingleEu(char *srcAddr, short srcIncr,
+               char *destAddr, short destIncr, int dmaSize,
+               short xferSizeIncr, int flags, int *currBD,
+               int *cSave, volatile TaskTableEntry *taskTable,
+               int channel);
+
+
+/*
+ * Task 4
+ */
+void  MCD_startDmaENetRcv(char *bDBase, char *currBD,
+               char *rcvFifoPtr,
+               volatile TaskTableEntry *taskTable, int channel);
+
+
+/*
+ * Task 5
+ */
+void  MCD_startDmaENetXmit(char *bDBase, char *currBD,
+               char *xmitFifoPtr,
+               volatile TaskTableEntry *taskTable, int channel);
+
+#endif  /* MCD_TSK_INIT_H */
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/Makefile b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/Makefile
new file mode 100644 (file)
index 0000000..a538645
--- /dev/null
@@ -0,0 +1,7 @@
+#
+# Makefile for Linux arch/m68k/coldfire/m547x source directory
+#
+
+obj-$(CONFIG_M547X_8X) += config.o mcf548x-devices.o devices.o
+obj-$(CONFIG_PCI)       += pci.o
+obj-$(CONFIG_MCD_DMA)  += dma.o MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/config.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/config.c
new file mode 100644 (file)
index 0000000..9c325fc
--- /dev/null
@@ -0,0 +1,435 @@
+/*
+ *  linux/arch/m68k/coldfire/config.c
+ *
+ *  Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Kurt Mahan kmahan@freescale.com
+ *  Matt Waddel Matt.Waddel@freescale.com
+ *  Shrek Wu b16972@freescale.com
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/console.h>
+#include <linux/bootmem.h>
+#include <linux/mm.h>
+#include <linux/clockchips.h>
+#include <asm/bootinfo.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/cfcache.h>
+#include <asm/cacheflush.h>
+#include <linux/io.h>
+#include <asm/cfmmu.h>
+#include <asm/setup.h>
+#include <asm/irq.h>
+#include <asm/traps.h>
+#include <asm/movs.h>
+#include <asm/movs.h>
+#include <asm/page.h>
+#include <asm/pgalloc.h>
+
+#include <asm/mcfsim.h>
+
+#define UBOOT_PCI
+#include <asm/bootinfo.h>
+#include <asm/m5485gpt.h>
+
+extern int get_irq_list(struct seq_file *p, void *v);
+extern char _text, _end;
+extern char _etext, _edata, __init_begin, __init_end;
+extern struct console mcfrs_console;
+extern char m68k_command_line[CL_SIZE];
+extern unsigned long availmem;
+
+static int irq_enable[NR_IRQS];
+unsigned long num_pages;
+
+/* cf dma physical addresses */
+unsigned long cf_dma_base;
+unsigned long cf_dma_end;
+unsigned long cf_dma_size;
+EXPORT_SYMBOL(cf_dma_base);
+EXPORT_SYMBOL(cf_dma_end);
+EXPORT_SYMBOL(cf_dma_size);
+
+/* ethernet mac addresses from uboot */
+unsigned char uboot_enet0[6];
+unsigned char uboot_enet1[6];
+
+void coldfire_sort_memrec(void)
+{
+       int i, j;
+
+       /* Sort the m68k_memory records by address */
+       for (i = 0; i < m68k_num_memory; ++i) {
+               for (j = i + 1; j < m68k_num_memory; ++j) {
+                       if (m68k_memory[i].addr > m68k_memory[j].addr) {
+                               struct mem_info tmp;
+                               tmp = m68k_memory[i];
+                               m68k_memory[i] = m68k_memory[j];
+                               m68k_memory[j] = tmp;
+                       }
+               }
+       }
+       /* Trim off discontiguous bits */
+       for (i = 1; i < m68k_num_memory; ++i) {
+               if ((m68k_memory[i-1].addr + m68k_memory[i-1].size) !=
+                       m68k_memory[i].addr) {
+                       printk(KERN_DEBUG "m68k_parse_bootinfo: "
+                               "addr gap between 0x%lx & 0x%lx\n",
+                               m68k_memory[i-1].addr+m68k_memory[i-1].size,
+                               m68k_memory[i].addr);
+                       m68k_num_memory = i;
+                       break;
+               }
+       }
+}
+
+/*
+ * UBoot Handler
+ */
+int __init uboot_commandline(char *bootargs)
+{
+       int len = 0, cmd_line_len;
+       static struct uboot_record uboot_info;
+       u32 offset = PAGE_OFFSET_RAW - PHYS_OFFSET;
+
+       extern unsigned long uboot_info_stk;
+
+       /* validate address */
+       if ((uboot_info_stk < PAGE_OFFSET_RAW) ||
+           (uboot_info_stk >= (PAGE_OFFSET_RAW + CONFIG_SDRAM_SIZE)))
+               return 0;
+
+       /* Add offset to get post-remapped kernel memory location */
+       uboot_info.bdi = (struct bd_info *)((*(u32 *)(uboot_info_stk))
+                                                       + offset);
+       uboot_info.initrd_start = (*(u32 *)(uboot_info_stk+4)) + offset;
+       uboot_info.initrd_end = (*(u32 *)(uboot_info_stk+8)) + offset;
+       uboot_info.cmd_line_start = (*(u32 *)(uboot_info_stk+12)) + offset;
+       uboot_info.cmd_line_stop = (*(u32 *)(uboot_info_stk+16)) + offset;
+
+       /* copy over mac addresses */
+       memcpy(uboot_enet0, uboot_info.bdi->bi_enet0addr, 6);
+       memcpy(uboot_enet1, uboot_info.bdi->bi_enet1addr, 6);
+
+       /* copy command line */
+       cmd_line_len = uboot_info.cmd_line_stop - uboot_info.cmd_line_start;
+       if ((cmd_line_len > 0) && (cmd_line_len < CL_SIZE-1))
+               len = (int)strncpy(bootargs, (char *)uboot_info.cmd_line_start,\
+                                  cmd_line_len);
+
+       return len;
+}
+
+/*
+ * This routine does things not done in the bootloader.
+ */
+#define DEFAULT_COMMAND_LINE \
+       "debug root=/dev/nfs rw \
+       nfsroot=172.27.155.1:/tftpboot/rigo/rootfs/ \
+       ip=172.27.155.75:172.27.155.1"
+
+asmlinkage void __init cf_early_init(void)
+{
+       struct bi_record *record = (struct bi_record *) &_end;
+
+       extern char _end;
+
+       SET_VBR((void *)MCF_RAMBAR0);
+
+       /* Mask all interrupts */
+       MCF_IMRL = 0xFFFFFFFF;
+       MCF_IMRH = 0xFFFFFFFF;
+
+       m68k_machtype = MACH_CFMMU;
+       m68k_fputype = FPU_CFV4E;
+       m68k_mmutype = MMU_CFV4E;
+       m68k_cputype = CPU_CFV4E;
+
+       m68k_num_memory = 0;
+       m68k_memory[m68k_num_memory].addr = CONFIG_SDRAM_BASE;
+       m68k_memory[m68k_num_memory++].size = CONFIG_SDRAM_SIZE;
+
+       if (!uboot_commandline(m68k_command_line)) {
+#if defined(CONFIG_BOOTPARAM)
+               strncpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE-1);
+#else
+               strcpy(m68k_command_line, DEFAULT_COMMAND_LINE);
+#endif
+       }
+
+#if defined(CONFIG_BLK_DEV_INITRD)
+       /* add initrd image */
+       record = (struct bi_record *) ((void *)record + record->size);
+       record->tag = BI_RAMDISK;
+       record->size =  sizeof(record->tag) + sizeof(record->size)
+               + sizeof(record->data[0]) + sizeof(record->data[1]);
+#endif
+
+       /* Mark end of tags. */
+       record = (struct bi_record *) ((void *) record + record->size);
+       record->tag = 0;
+       record->data[0] = 0;
+       record->data[1] = 0;
+       record->size = sizeof(record->tag) + sizeof(record->size)
+               + sizeof(record->data[0]) + sizeof(record->data[1]);
+
+       /* Invalidate caches via CACR */
+       flush_bcache();
+       cacr_set(CACHE_DISABLE_MODE);
+
+       /* Turn on caches via CACR, enable EUSP */
+       cacr_set(CACHE_INITIAL_MODE);
+
+}
+
+/* Assembler routines */
+asmlinkage void buserr(void);
+asmlinkage void trap(void);
+asmlinkage void system_call(void);
+asmlinkage void inthandler(void);
+
+void __init coldfire_trap_init(void)
+{
+       int i = 0;
+       e_vector *vectors;
+
+       vectors = (e_vector *)MCF_RAMBAR0;
+       /*
+        * There is a common trap handler and common interrupt
+        * handler that handle almost every vector. We treat
+        * the system call and bus error special, they get their
+        * own first level handlers.
+        */
+       for (i = 3; (i <= 23); i++)
+               vectors[i] = trap;
+       for (i = 33; (i <= 63); i++)
+               vectors[i] = trap;
+       for (i = 24; (i <= 31); i++)
+               vectors[i] = inthandler;
+       for (i = 64; (i < 255); i++)
+               vectors[i] = inthandler;
+
+       vectors[255] = 0;
+       vectors[2] = buserr;
+       vectors[32] = system_call;
+}
+
+#ifndef CONFIG_GENERIC_CLOCKEVENTS
+void coldfire_tick(void)
+{
+       /* Reset the ColdFire timer */
+       MCF_SSR(0) = MCF_SSR_ST;
+}
+
+void __init coldfire_sched_init(irq_handler_t handler)
+{
+       int irq = ISC_SLTn(0);
+
+       MCF_SCR(0) = 0;
+       MCF_ICR(irq) = ILP_SLT0;
+       request_irq(64 + irq, handler, IRQF_DISABLED, "ColdFire Timer 0", NULL);
+       MCF_SLTCNT(0) = MCF_BUSCLK / HZ;
+       MCF_SCR(0) |=  MCF_SCR_TEN | MCF_SCR_IEN | MCF_SCR_RUN;
+}
+
+unsigned long coldfire_gettimeoffset(void)
+{
+       volatile unsigned long trr, tcn, offset;
+       trr = MCF_SLTCNT(0);
+       tcn = MCF_SCNT(0);
+
+       offset = (trr - tcn) * ((1000000 >> 3) / HZ) / (trr >> 3);
+       if (MCF_SSR(0) & MCF_SSR_ST)
+               offset += 1000000 / HZ;
+
+       return offset;
+}
+#else
+static unsigned long long sched_dtim_clk_val;
+
+unsigned long long sched_clock(void)
+{
+       unsigned long flags;
+       unsigned long long cycles;
+       volatile unsigned long trr, tcn, offset;
+
+       local_irq_save(flags);
+       trr = MCF_SLTCNT(0);
+       tcn = MCF_SCNT(0);
+       offset = (trr - tcn);
+       cycles = sched_dtim_clk_val;
+       local_irq_restore(flags);
+
+       return cycles + offset;
+}
+
+unsigned long long sys_dtim2_read(void)
+{
+       unsigned long flags;
+       unsigned long long cycles;
+       volatile unsigned long trr, tcn, offset;
+
+       local_irq_save(flags);
+       trr = MCF_SLTCNT(0);
+       tcn = MCF_SCNT(0);
+       offset = (trr - tcn);
+       cycles = sched_dtim_clk_val;
+       local_irq_restore(flags);
+
+       return cycles + offset;
+}
+
+static irqreturn_t coldfire_dtim_clk_irq(int irq, void *dev)
+{
+       struct clock_event_device *evt =
+               (struct clock_event_device *)dev;
+
+       MCF_SSR(0) = MCF_SSR_ST;
+       sched_dtim_clk_val +=  (MCF_BUSCLK) / HZ;;
+       evt->event_handler(evt);
+       return IRQ_HANDLED;
+}
+
+void sys_dtim2_init(struct clock_event_device *evt)
+{
+       int irq = ISC_SLTn(0);
+
+       sched_dtim_clk_val = 0;
+       MCF_SCR(0) = 0;
+       MCF_ICR(irq) = ILP_SLT0;
+       request_irq(64 + irq, coldfire_dtim_clk_irq, IRQF_DISABLED,
+               "ColdFire Timer 0", (void *)evt);
+       MCF_SLTCNT(0) = MCF_BUSCLK / HZ;
+       MCF_SCR(0) |=  MCF_SCR_TEN | MCF_SCR_IEN | MCF_SCR_RUN;
+}
+#endif
+
+void coldfire_reboot(void)
+{
+       /* disable interrupts and enable the watchdog */
+       printk(KERN_INFO "Rebooting\n");
+       asm("movew #0x2700, %sr\n");
+       MCF_GPT_GMS0 = MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4);
+}
+
+static void coldfire_get_model(char *model)
+{
+       sprintf(model, "Version 4 ColdFire");
+}
+
+static void __init
+coldfire_bootmem_alloc(unsigned long memory_start, unsigned long memory_end)
+{
+       unsigned long base_pfn;
+
+       /* compute total pages in system */
+       num_pages = PAGE_ALIGN(memory_end - PAGE_OFFSET) >> PAGE_SHIFT;
+
+       /* align start/end to page boundries */
+       memory_start = PAGE_ALIGN(memory_start);
+       memory_end = memory_end & PAGE_MASK;
+
+       /* page numbers */
+       base_pfn = __pa(PAGE_OFFSET) >> PAGE_SHIFT;
+       min_low_pfn = __pa(memory_start) >> PAGE_SHIFT;
+       max_low_pfn = __pa(memory_end) >> PAGE_SHIFT;
+
+       high_memory = (void *)memory_end;
+       availmem = memory_start;
+
+       /* setup bootmem data */
+       m68k_setup_node(0);
+       availmem += init_bootmem_node(NODE_DATA(0), min_low_pfn,
+               base_pfn, max_low_pfn);
+       availmem = PAGE_ALIGN(availmem);
+
+       printk(KERN_INFO "** availmem=0x%lx  pa(am)=0x%lx\n",
+                       availmem, __pa(availmem));
+       printk(KERN_INFO "** mstart=0x%lx  mend=0x%lx\n",
+                       memory_start, memory_end);
+       printk(KERN_INFO "bpfn=0x%lx minpfn=0x%lx maxpfn=0x%lx\n",
+                       base_pfn, min_low_pfn, max_low_pfn);
+
+       /* turn over physram */
+       free_bootmem(__pa(availmem), memory_end - (availmem));
+
+       /* configure physical dma area */
+       cf_dma_base = __pa(PAGE_ALIGN(memory_start));
+       cf_dma_size = CONFIG_DMA_SIZE;
+       cf_dma_end = CONFIG_SDRAM_BASE + cf_dma_size - 1;
+
+       printk(KERN_INFO "dma: phys base=0x%lx  phys end=0x%lx  virt base=0x%x\n",
+              cf_dma_base, cf_dma_end, CONFIG_DMA_BASE);
+
+       printk(KERN_INFO "mdma=0x%x  pa(mdma)=0x%lx\n",
+                       MAX_DMA_ADDRESS, __pa(MAX_DMA_ADDRESS));
+}
+
+void __init config_coldfire(void)
+{
+       unsigned long endmem, startmem;
+       int i;
+
+       /*
+        * Calculate endmem from m68k_memory, assume all are contiguous
+        */
+       startmem = ((((int) &_end) + (PAGE_SIZE - 1)) & PAGE_MASK);
+       endmem = PAGE_OFFSET;
+       for (i = 0; i < m68k_num_memory; ++i)
+               endmem += m68k_memory[i].size;
+
+       printk(KERN_INFO "starting up linux startmem 0x%lx, endmem 0x%lx, \
+               size %luMB\n", startmem,  endmem, (endmem - startmem) >> 20);
+
+       memset(irq_enable, 0, sizeof(irq_enable));
+
+       /*
+        * Setup coldfire mach-specific handlers
+        */
+       mach_max_dma_address    = 0xffffffff;
+#ifndef CONFIG_GENERIC_CLOCKEVENTS
+       mach_sched_init         = coldfire_sched_init;
+       mach_tick               = coldfire_tick;
+       mach_gettimeoffset      = coldfire_gettimeoffset;
+#endif
+       mach_reset              = coldfire_reboot;
+/*     mach_hwclk              = coldfire_hwclk; to be done */
+       mach_get_model          = coldfire_get_model;
+
+       coldfire_bootmem_alloc(startmem, endmem-1);
+
+       /*
+        * initrd setup
+        */
+/* #ifdef CONFIG_BLK_DEV_INITRD
+       if (m68k_ramdisk.size)  {
+               reserve_bootmem (__pa(m68k_ramdisk.addr), m68k_ramdisk.size);
+               initrd_start = (unsigned long) m68k_ramdisk.addr;
+               initrd_end = initrd_start + m68k_ramdisk.size;
+               printk (KERN_DEBUG "initrd: %08lx - %08lx\n", initrd_start,
+                       initrd_end);
+       }
+#endif */
+
+#if defined(CONFIG_DUMMY_CONSOLE) || defined(CONFIG_FRAMEBUFFER_CONSOLE)
+       conswitchp = &dummy_con;
+#endif
+
+#if defined(CONFIG_SERIAL_COLDFIRE)
+       /*
+        * This causes trouble when it is re-registered later.
+        * Currently this is fixed by conditionally commenting
+        * out the register_console in mcf_serial.c
+        */
+       register_console(&mcfrs_console);
+#endif
+}
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/devices.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/devices.c
new file mode 100644 (file)
index 0000000..05a4040
--- /dev/null
@@ -0,0 +1,176 @@
+/*
+ * arch/m68k/coldfire/m547x/devices.c
+ *
+ * Coldfire M547x/M548x Platform Device Configuration
+ *
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * Kurt Mahan <kmahan@freescale.com>
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/fsl_devices.h>
+#include <linux/spi/spi.h>
+#include <linux/i2c.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+#ifdef CONFIG_SPI
+
+#include <asm/mcfqspi.h>
+/*
+ *
+ * DSPI
+ *
+ */
+
+/* number of supported SPI selects */
+#define SPI_NUM_CHIPSELECTS    8
+
+void coldfire_spi_cs_control(u8 cs, u8 command)
+{
+       /* nothing special required */
+}
+
+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
+static struct coldfire_spi_chip spidev_chip_info = {
+       .bits_per_word = 8,
+};
+#endif
+
+static struct spi_board_info spi_board_info[] = {
+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
+       {
+               .modalias = "spidev",
+               .max_speed_hz = 16000000,       /* max clk (SCK) speed in HZ */
+               .bus_num = 1,
+               .chip_select = 0,               /* CS0 */
+               .controller_data = &spidev_chip_info,
+       }
+#endif
+};
+
+static int spi_irq_list[] = {
+       /* IRQ,              ICR Offset,        ICR Val,Mask */
+       64 + ISC_DSPI_OVRFW, ISC_DSPI_OVRFW,    0x18,   0,
+       64 + ISC_DSPI_RFOF,  ISC_DSPI_RFOF,     0x18,   0,
+       64 + ISC_DSPI_RFDF,  ISC_DSPI_RFDF,     0x18,   0,
+       64 + ISC_DSPI_TFUF,  ISC_DSPI_TFUF,     0x18,   0,
+       64 + ISC_DSPI_TCF,   ISC_DSPI_TCF,      0x18,   0,
+       64 + ISC_DSPI_TFFF,  ISC_DSPI_TFFF,     0x18,   0,
+       64 + ISC_DSPI_EOQF,  ISC_DSPI_EOQF,     0x18,   0,
+       0,0,0,0,
+};
+
+static struct coldfire_spi_master coldfire_master_info = {
+       .bus_num = 1,
+       .num_chipselect = SPI_NUM_CHIPSELECTS,
+       .irq_list = spi_irq_list,
+       .irq_source = 0,        /* not used */
+       .irq_vector = 0,        /* not used */
+       .irq_mask = 0,          /* not used */
+       .irq_lp = 0,            /* not used */
+       .par_val = 0,           /* not used */
+       .cs_control = coldfire_spi_cs_control,
+};
+
+static struct resource coldfire_spi_resources[] = {
+       [0] = {
+               .name = "spi-par",
+               .start = MCF_MBAR + 0x00000a50, /* PAR_DSPI */
+               .end = MCF_MBAR + 0x00000a50,   /* PAR_DSPI */
+               .flags = IORESOURCE_MEM
+       },
+
+       [1] = {
+               .name = "spi-module",
+               .start = MCF_MBAR + 0x00008a00, /* DSPI MCR Base */
+               .end = MCF_MBAR + 0x00008ab8,   /* DSPI mem map end */
+               .flags = IORESOURCE_MEM
+       },
+
+       [2] = {
+               .name = "spi-int-level",
+               .start = MCF_MBAR + 0x740,               /* ICR start */
+               .end = MCF_MBAR + 0x740 + ISC_DSPI_EOQF, /* ICR end */
+               .flags = IORESOURCE_MEM
+       },
+
+       [3] = {
+               .name = "spi-int-mask",
+               .start = MCF_MBAR + 0x70c,      /* IMRL */
+               .end = MCF_MBAR + 0x70c,        /* IMRL */
+               .flags = IORESOURCE_MEM
+       }
+};
+
+static struct platform_device coldfire_spi = {
+       .name = "spi_coldfire",
+       .id = -1,
+       .resource = coldfire_spi_resources,
+       .num_resources = ARRAY_SIZE(coldfire_spi_resources),
+       .dev = {
+               .platform_data = &coldfire_master_info,
+       }
+};
+
+/**
+ * m547x_8x_spi_init - Initialize SPI
+ */
+static int __init m547x_8x_spi_init(void)
+{
+       int retval;
+
+       /* initialize the DSPI PAR */
+       MCF_GPIO_PAR_DSPI = (MCF_GPIO_PAR_DSPI_PAR_CS5 |
+                            MCF_GPIO_PAR_DSPI_PAR_CS3_DSPICS |
+                            MCF_GPIO_PAR_DSPI_PAR_CS2_DSPICS |
+                            MCF_GPIO_PAR_DSPI_PAR_CS0_DSPICS |
+                            MCF_GPIO_PAR_DSPI_PAR_SCK_SCK |
+                            MCF_GPIO_PAR_DSPI_PAR_SIN_SIN |
+                            MCF_GPIO_PAR_DSPI_PAR_SOUT_SOUT);
+
+       /* register device */
+       retval = platform_device_register(&coldfire_spi);
+       if (retval < 0) {
+               goto out;
+       }
+
+       /* register board info */
+       if (ARRAY_SIZE(spi_board_info))
+               retval = spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
+
+out:
+       return retval;
+}
+#endif
+
+#ifdef CONFIG_I2C_BOARDINFO
+static struct i2c_board_info mcf_i2c_devices[] = {
+       {
+               I2C_BOARD_INFO("rv5c387a", 0x32),
+       },
+};
+#endif
+
+/**
+ * m547x_8x_init_devices - Initialize M547X_8X devices
+ *
+ * Returns 0 on success.
+ */
+static int __init m547x_8x_init_devices(void)
+{
+#ifdef CONFIG_SPI
+       m547x_8x_spi_init();
+#endif
+#ifdef CONFIG_I2C_BOARDINFO
+       i2c_register_board_info(0, mcf_i2c_devices,
+                               ARRAY_SIZE(mcf_i2c_devices));
+#endif
+
+       return 0;
+}
+arch_initcall(m547x_8x_init_devices);
diff --git a/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/dma.c b/target/linux/coldfire/files-2.6.31/arch/m68k/coldfire/m547x/dma.c
new file mode 100644 (file)
index 0000000..3b24c9b
--- /dev/null
@@ -0,0 +1,518 @@
+/*
+ * arch/m68k/coldfire/m547x/dma.c
+ *
+ * Coldfire M547x/M548x DMA
+ *
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Kurt Mahan <kmahan@freescale.com>
+ * Shrek Wu b16972@freescale.com
+ *
+ * This code is based on patches from the Freescale M547x_8x BSP
+ * release mcf547x_8x-20070107-ltib.iso
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/dma.h>
+#include <asm/coldfire.h>
+#include <asm/m5485sram.h>
+#include <asm/mcfsim.h>
+#include <asm/MCD_dma.h>
+
+/*
+ * This global keeps track of which initiators have been
+ * used of the available assignments.  Initiators 0-15 are
+ * hardwired.  Initiators 16-31 are multiplexed and controlled
+ * via the Initiatior Mux Control Registe (IMCR).  The
+ * assigned requestor is stored with the associated initiator
+ * number.
+ */
+static int used_reqs[32] = {
+       DMA_ALWAYS, DMA_DSPI_RX, DMA_DSPI_TX, DMA_DREQ0,
+       DMA_PSC0_RX, DMA_PSC0_TX, DMA_USBEP0, DMA_USBEP1,
+       DMA_USBEP2, DMA_USBEP3, DMA_PCI_TX, DMA_PCI_RX,
+       DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX, DMA_I2C_TX,
+       0, 0, 0, 0,
+       0, 0, 0, 0,
+       0, 0, 0, 0,
+       0, 0, 0, 0
+};
+
+/*
+ * This global keeps track of which channels have been assigned
+ * to tasks.  This methology assumes that no single initiator
+ * will be tied to more than one task/channel
+ */
+static char used_channel[16] = {
+       -1, -1, -1, -1, -1, -1, -1, -1,
+       -1, -1, -1, -1, -1, -1, -1, -1
+};
+
+unsigned int connected_channel[16] = {
+       0, 0, 0, 0, 0, 0, 0, 0,
+       0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/**
+ * dma_set_initiator - enable initiator
+ * @initiator: initiator identifier
+ *
+ * Returns 0 of successful, non-zero otherwise
+ *
+ * Attempt to enable the provided Initiator in the Initiator
+ * Mux Control Register.
+ */
+int dma_set_initiator(int initiator)
+{
+       switch (initiator) {
+       case DMA_ALWAYS:
+       case DMA_DSPI_RX:
+       case DMA_DSPI_TX:
+       case DMA_DREQ0:
+       case DMA_PSC0_RX:
+       case DMA_PSC0_TX:
+       case DMA_USBEP0:
+       case DMA_USBEP1:
+       case DMA_USBEP2:
+       case DMA_USBEP3:
+       case DMA_PCI_TX:
+       case DMA_PCI_RX:
+       case DMA_PSC1_RX:
+       case DMA_PSC1_TX:
+       case DMA_I2C_RX:
+       case DMA_I2C_TX:
+               /*
+                * These initiators are always active
+                */
+               break;
+
+       case DMA_FEC0_RX:
+               MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC16(3))
+                   | MCF_DMA_IMCR_SRC16_FEC0RX;
+               used_reqs[16] = DMA_FEC0_RX;
+               break;
+
+       case DMA_FEC0_TX:
+               MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC17(3))
+                   | MCF_DMA_IMCR_SRC17_FEC0TX;
+               used_reqs[17] = DMA_FEC0_TX;
+               break;
+
+       case DMA_FEC1_RX:
+               MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC20(3))
+                   | MCF_DMA_IMCR_SRC20_FEC1RX;
+               used_reqs[20] = DMA_FEC1_RX;
+               break;
+
+       case DMA_FEC1_TX:
+               if (used_reqs[21] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC21(3))
+                           | MCF_DMA_IMCR_SRC21_FEC1TX;
+                       used_reqs[21] = DMA_FEC1_TX;
+               } else if (used_reqs[25] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC25(3))
+                           | MCF_DMA_IMCR_SRC25_FEC1TX;
+                       used_reqs[25] = DMA_FEC1_TX;
+               } else if (used_reqs[31] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC31(3))
+                           | MCF_DMA_IMCR_SRC31_FEC1TX;
+                       used_reqs[31] = DMA_FEC1_TX;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_DREQ1:
+               if (used_reqs[29] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC29(3))
+                           | MCF_DMA_IMCR_SRC29_DREQ1;
+                       used_reqs[29] = DMA_DREQ1;
+               } else if (used_reqs[21] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC21(3))
+                           | MCF_DMA_IMCR_SRC21_DREQ1;
+                       used_reqs[21] = DMA_DREQ1;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_CTM0:
+               if (used_reqs[24] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC24(3))
+                           | MCF_DMA_IMCR_SRC24_CTM0;
+                       used_reqs[24] = DMA_CTM0;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_CTM1:
+               if (used_reqs[25] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC25(3))
+                           | MCF_DMA_IMCR_SRC25_CTM1;
+                       used_reqs[25] = DMA_CTM1;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_CTM2:
+               if (used_reqs[26] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC26(3))
+                           | MCF_DMA_IMCR_SRC26_CTM2;
+                       used_reqs[26] = DMA_CTM2;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_CTM3:
+               if (used_reqs[27] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC27(3))
+                           | MCF_DMA_IMCR_SRC27_CTM3;
+                       used_reqs[27] = DMA_CTM3;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_CTM4:
+               if (used_reqs[28] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC28(3))
+                           | MCF_DMA_IMCR_SRC28_CTM4;
+                       used_reqs[28] = DMA_CTM4;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_CTM5:
+               if (used_reqs[29] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC29(3))
+                           | MCF_DMA_IMCR_SRC29_CTM5;
+                       used_reqs[29] = DMA_CTM5;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_CTM6:
+               if (used_reqs[30] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC30(3))
+                           | MCF_DMA_IMCR_SRC30_CTM6;
+                       used_reqs[30] = DMA_CTM6;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_CTM7:
+               if (used_reqs[31] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC31(3))
+                           | MCF_DMA_IMCR_SRC31_CTM7;
+                       used_reqs[31] = DMA_CTM7;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_USBEP4:
+               if (used_reqs[26] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC26(3))
+                           | MCF_DMA_IMCR_SRC26_USBEP4;
+                       used_reqs[26] = DMA_USBEP4;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_USBEP5:
+               if (used_reqs[27] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC27(3))
+                           | MCF_DMA_IMCR_SRC27_USBEP5;
+                       used_reqs[27] = DMA_USBEP5;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_USBEP6:
+               if (used_reqs[28] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC28(3))
+                           | MCF_DMA_IMCR_SRC28_USBEP6;
+                       used_reqs[28] = DMA_USBEP6;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_PSC2_RX:
+               if (used_reqs[28] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC28(3))
+                           | MCF_DMA_IMCR_SRC28_PSC2RX;
+                       used_reqs[28] = DMA_PSC2_RX;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_PSC2_TX:
+               if (used_reqs[29] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC29(3))
+                           | MCF_DMA_IMCR_SRC29_PSC2TX;
+                       used_reqs[29] = DMA_PSC2_TX;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_PSC3_RX:
+               if (used_reqs[30] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC30(3))
+                           | MCF_DMA_IMCR_SRC30_PSC3RX;
+                       used_reqs[30] = DMA_PSC3_RX;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       case DMA_PSC3_TX:
+               if (used_reqs[31] == 0) {
+                       MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_SRC31(3))
+                           | MCF_DMA_IMCR_SRC31_PSC3TX;
+                       used_reqs[31] = DMA_PSC3_TX;
+               } else          /* No empty slots */
+                       return 1;
+               break;
+
+       default:
+               return 1;
+       }
+       return 0;
+}
+
+/**
+ * dma_get_initiator - get the initiator for the given requestor
+ * @requestor: initiator identifier
+ *
+ * Returns initiator number (0-31) if assigned or just 0
+ */
+unsigned int dma_get_initiator(int requestor)
+{
+       u32 i;
+
+       for (i = 0; i < sizeof(used_reqs); ++i) {
+               if (used_reqs[i] == requestor)
+                       return i;
+       }
+       return 0;
+}
+
+/**
+ * dma_remove_initiator - remove the given initiator from active list
+ * @requestor: requestor to remove
+ */
+void dma_remove_initiator(int requestor)
+{
+       u32 i;
+
+       for (i = 0; i < sizeof(used_reqs); ++i) {
+               if (used_reqs[i] == requestor) {
+                       used_reqs[i] = -1;
+                       break;
+               }
+       }
+}
+
+/**
+ * dma_set_channel_fec: find available channel for fec and mark
+ * @requestor: initiator/requestor identifier
+ *
+ * Returns first avaialble channel (0-5) or -1 if all occupied
+ */
+int dma_set_channel_fec(int requestor)
+{
+       u32 i, t;
+
+#ifdef CONFIG_FEC_548x_ENABLE_FEC2
+       t = 4;
+#else
+       t = 2;
+#endif
+
+       for (i = 0; i < t ; ++i) {
+               if (used_channel[i] == -1) {
+                       used_channel[i] = requestor;
+                       return i;
+               }
+       }
+       /* All channels taken */
+       return -1;
+}
+
+/**
+ * dma_set_channel - find an available channel and mark as used
+ * @requestor: initiator/requestor identifier
+ *
+ * Returns first available channel (6-15) or -1 if all occupied
+ */
+int dma_set_channel(int requestor)
+{
+       u32 i;
+#ifdef CONFIG_NET_FEC2
+       i = 4;
+#else
+       i = 2;
+#endif
+
+       for (; i < 16; ++i)
+               if (used_channel[i] == -1) {
+                       used_channel[i] = requestor;
+                       return i;
+               }
+
+       /* All channels taken */
+       return -1;
+}
+
+/**
+ * dma_get_channel - get the channel being initiated by the requestor
+ * @requestor: initiator/requestor identifier
+ *
+ * Returns Initiator for requestor or -1 if not found
+ */
+int dma_get_channel(int requestor)
+{
+       u32 i;
+
+       for (i = 0; i < sizeof(used_channel); ++i) {
+               if (used_channel[i] == requestor)
+                       return i;
+       }
+       return -1;
+}
+
+/**
+ * dma_connect - connect a channel with reference on data
+ * @channel: channel number
+ * @address: reference address of data
+ *
+ * Returns 0 if success or -1 if invalid channel
+ */
+int dma_connect(int channel, int address)
+{
+       if ((channel < 16) && (channel >= 0)) {
+               connected_channel[channel] = address;
+               return 0;
+       }
+       return -1;
+}
+
+/**
+ * dma_disconnect - disconnect a channel
+ * @channel: channel number
+ *
+ * Returns 0 if success or -1 if invalid channel
+ */
+int dma_disconnect(int channel)
+{
+       if ((channel < 16) && (channel >= 0)) {
+               connected_channel[channel] = 0;
+               return 0;
+       }
+       return -1;
+}
+
+/**
+ * dma_remove_channel - remove channel from the active list
+ * @requestor: initiator/requestor identifier
+ */
+void dma_remove_channel(int requestor)
+{
+       u32 i;
+
+       for (i = 0; i < sizeof(used_channel); ++i) {
+               if (used_channel[i] == requestor) {
+                       used_channel[i] = -1;
+                       break;
+               }
+       }
+}
+
+/**
+ * dma_interrupt_handler - dma interrupt handler
+ * @irq: interrupt number
+ * @dev_id: data
+ *
+ * Returns IRQ_HANDLED
+ */
+irqreturn_t dma_interrupt_handler(int irq, void *dev_id)
+{
+       u32 i, interrupts;
+
+       /*
+        * Determine which interrupt(s) triggered by AND'ing the
+        * pending interrupts with those that aren't masked.
+        */
+       interrupts = MCF_DMA_DIPR;
+       MCF_DMA_DIPR = interrupts;
+
+       for (i = 0; i < 16; ++i, interrupts >>= 1) {
+               if (interrupts & 0x1)
+                       if (connected_channel[i] != 0)
+                               ((void (*)(void)) (connected_channel[i])) ();
+       }
+
+       return IRQ_HANDLED;
+}
+
+/**
+ * dma_remove_channel_by_number - clear dma channel
+ * @channel: channel number to clear
+ */
+void dma_remove_channel_by_number(int channel)
+{
+       if ((channel < sizeof(used_channel)) && (channel >= 0))
+               used_channel[channel] = -1;
+}
+
+/**
+ * dma_init - initialize the dma subsystem
+ *
+ * Returns 0 if success non-zero if failure
+ *
+ * Handles the DMA initialization during device setup.
+ */
+int __devinit dma_init()
+{
+       int result;
+       char *dma_version_str;
+
+