kernel/modules/other/mlxreg: add new package
[openwrt/openwrt.git] / package / boot / uboot-mediatek / patches / 435-add-h3c_magic-nx30-pro.patch
1 --- /dev/null
2 +++ b/configs/mt7981_h3c_magic-nx30-pro_defconfig
3 @@ -0,0 +1,175 @@
4 +CONFIG_ARM=y
5 +CONFIG_POSITION_INDEPENDENT=y
6 +CONFIG_ARCH_MEDIATEK=y
7 +CONFIG_TARGET_MT7981=y
8 +CONFIG_TEXT_BASE=0x41e00000
9 +CONFIG_SYS_MALLOC_F_LEN=0x4000
10 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
11 +CONFIG_NR_DRAM_BANKS=1
12 +CONFIG_DEFAULT_DEVICE_TREE="mt7981_h3c_magic-nx30-pro"
13 +CONFIG_DEFAULT_ENV_FILE="h3c_magic-nx30-pro_env"
14 +CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_h3c_magic-nx30-pro.dtb"
15 +CONFIG_OF_LIBFDT_OVERLAY=y
16 +CONFIG_DEBUG_UART_BASE=0x11002000
17 +CONFIG_DEBUG_UART_CLOCK=40000000
18 +CONFIG_DEBUG_UART=y
19 +CONFIG_SYS_LOAD_ADDR=0x46000000
20 +CONFIG_SMBIOS_PRODUCT_NAME=""
21 +CONFIG_AUTOBOOT_KEYED=y
22 +CONFIG_BOOTDELAY=30
23 +CONFIG_AUTOBOOT_MENU_SHOW=y
24 +CONFIG_CFB_CONSOLE_ANSI=y
25 +CONFIG_BOARD_LATE_INIT=y
26 +CONFIG_BUTTON=y
27 +CONFIG_BUTTON_GPIO=y
28 +CONFIG_GPIO_HOG=y
29 +CONFIG_CMD_ENV_FLAGS=y
30 +CONFIG_FIT=y
31 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
32 +CONFIG_LED=y
33 +CONFIG_LED_BLINK=y
34 +CONFIG_LED_GPIO=y
35 +CONFIG_LOGLEVEL=7
36 +CONFIG_LOG=y
37 +CONFIG_SYS_PROMPT="MT7981> "
38 +CONFIG_CMD_BOOTMENU=y
39 +CONFIG_CMD_BOOTP=y
40 +CONFIG_CMD_BUTTON=y
41 +CONFIG_CMD_CACHE=y
42 +CONFIG_CMD_CDP=y
43 +CONFIG_CMD_CPU=y
44 +CONFIG_CMD_DHCP=y
45 +CONFIG_CMD_DM=y
46 +CONFIG_CMD_DNS=y
47 +CONFIG_CMD_ECHO=y
48 +CONFIG_CMD_ENV_READMEM=y
49 +CONFIG_CMD_ERASEENV=y
50 +CONFIG_CMD_EXT4=y
51 +CONFIG_CMD_FAT=y
52 +CONFIG_CMD_FDT=y
53 +CONFIG_CMD_FS_GENERIC=y
54 +CONFIG_CMD_FS_UUID=y
55 +CONFIG_CMD_GPIO=y
56 +CONFIG_CMD_GPT=y
57 +CONFIG_CMD_HASH=y
58 +CONFIG_CMD_ITEST=y
59 +CONFIG_CMD_LED=y
60 +CONFIG_CMD_LICENSE=y
61 +CONFIG_CMD_LINK_LOCAL=y
62 +# CONFIG_CMD_MBR is not set
63 +CONFIG_CMD_PCI=y
64 +CONFIG_CMD_PSTORE=y
65 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
66 +CONFIG_CMD_SF_TEST=y
67 +CONFIG_CMD_PING=y
68 +CONFIG_CMD_PXE=y
69 +CONFIG_CMD_PWM=y
70 +CONFIG_CMD_SMC=y
71 +CONFIG_CMD_TFTPBOOT=y
72 +CONFIG_CMD_TFTPSRV=y
73 +CONFIG_CMD_UBI=y
74 +CONFIG_CMD_UBI_RENAME=y
75 +CONFIG_CMD_UBIFS=y
76 +CONFIG_CMD_ASKENV=y
77 +CONFIG_CMD_PART=y
78 +CONFIG_CMD_RARP=y
79 +CONFIG_CMD_SETEXPR=y
80 +CONFIG_CMD_SLEEP=y
81 +CONFIG_CMD_SNTP=y
82 +CONFIG_CMD_SOURCE=y
83 +CONFIG_CMD_STRINGS=y
84 +CONFIG_CMD_UUID=y
85 +CONFIG_DISPLAY_CPUINFO=y
86 +CONFIG_DM_MTD=y
87 +CONFIG_DM_REGULATOR=y
88 +CONFIG_DM_REGULATOR_FIXED=y
89 +CONFIG_DM_REGULATOR_GPIO=y
90 +CONFIG_DM_PWM=y
91 +CONFIG_PWM_MTK=y
92 +CONFIG_HUSH_PARSER=y
93 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
94 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
95 +CONFIG_VERSION_VARIABLE=y
96 +CONFIG_PARTITION_UUIDS=y
97 +CONFIG_NETCONSOLE=y
98 +CONFIG_REGMAP=y
99 +CONFIG_SYSCON=y
100 +CONFIG_CLK=y
101 +CONFIG_DM_GPIO=y
102 +CONFIG_DM_SCSI=y
103 +CONFIG_AHCI=y
104 +CONFIG_AHCI_PCI=y
105 +CONFIG_SCSI_AHCI=y
106 +CONFIG_SCSI=y
107 +CONFIG_CMD_SCSI=y
108 +CONFIG_PHY=y
109 +CONFIG_PHY_MTK_TPHY=y
110 +CONFIG_PHY_FIXED=y
111 +CONFIG_MTK_AHCI=y
112 +CONFIG_DM_ETH=y
113 +CONFIG_MEDIATEK_ETH=y
114 +CONFIG_PCI=y
115 +# CONFIG_MMC is not set
116 +# CONFIG_DM_MMC is not set
117 +CONFIG_MTD=y
118 +CONFIG_MTD_UBI_FASTMAP=y
119 +CONFIG_DM_PCI=y
120 +CONFIG_PCIE_MEDIATEK=y
121 +CONFIG_PINCTRL=y
122 +CONFIG_PINCONF=y
123 +CONFIG_PINCTRL_MT7622=y
124 +CONFIG_POWER_DOMAIN=y
125 +CONFIG_PRE_CONSOLE_BUFFER=y
126 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
127 +CONFIG_MTK_POWER_DOMAIN=y
128 +CONFIG_RAM=y
129 +CONFIG_DM_SERIAL=y
130 +CONFIG_MTK_SERIAL=y
131 +CONFIG_SPI=y
132 +CONFIG_DM_SPI=y
133 +CONFIG_MTK_SPI_NAND=y
134 +CONFIG_MTK_SPI_NAND_MTD=y
135 +CONFIG_SYSRESET_WATCHDOG=y
136 +CONFIG_WDT_MTK=y
137 +CONFIG_LZO=y
138 +CONFIG_ZSTD=y
139 +CONFIG_HEXDUMP=y
140 +CONFIG_RANDOM_UUID=y
141 +CONFIG_REGEX=y
142 +CONFIG_OF_EMBED=y
143 +CONFIG_ENV_OVERWRITE=y
144 +CONFIG_ENV_IS_IN_UBI=y
145 +CONFIG_ENV_UBI_PART="ubi"
146 +CONFIG_ENV_SIZE=0x1f000
147 +CONFIG_ENV_SIZE_REDUND=0x1f000
148 +CONFIG_ENV_UBI_VOLUME="ubootenv"
149 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
150 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
151 +CONFIG_NET_RANDOM_ETHADDR=y
152 +CONFIG_REGMAP=y
153 +CONFIG_SYSCON=y
154 +CONFIG_CLK=y
155 +CONFIG_PHY_FIXED=y
156 +CONFIG_DM_ETH=y
157 +CONFIG_MEDIATEK_ETH=y
158 +CONFIG_PINCTRL=y
159 +CONFIG_PINCONF=y
160 +CONFIG_PINCTRL_MT7981=y
161 +CONFIG_POWER_DOMAIN=y
162 +CONFIG_MTK_POWER_DOMAIN=y
163 +CONFIG_DM_REGULATOR=y
164 +CONFIG_DM_REGULATOR_FIXED=y
165 +CONFIG_DM_SERIAL=y
166 +CONFIG_MTK_SERIAL=y
167 +CONFIG_HEXDUMP=y
168 +CONFIG_USE_DEFAULT_ENV_FILE=y
169 +CONFIG_MTD_SPI_NAND=y
170 +CONFIG_MTK_SPIM=y
171 +CONFIG_CMD_MTD=y
172 +CONFIG_CMD_NAND=y
173 +CONFIG_CMD_NAND_TRIMFFS=y
174 +CONFIG_LMB_MAX_REGIONS=64
175 +CONFIG_USE_IPADDR=y
176 +CONFIG_IPADDR="192.168.1.1"
177 +CONFIG_USE_SERVERIP=y
178 +CONFIG_SERVERIP="192.168.1.254"
179 --- /dev/null
180 +++ b/arch/arm/dts/mt7981_h3c_magic-nx30-pro.dts
181 @@ -0,0 +1,205 @@
182 +// SPDX-License-Identifier: GPL-2.0
183 +/*
184 + * Copyright (c) 2022 MediaTek Inc.
185 + * Author: Sam Shih <sam.shih@mediatek.com>
186 + */
187 +
188 +/dts-v1/;
189 +#include "mt7981.dtsi"
190 +#include <dt-bindings/gpio/gpio.h>
191 +#include <dt-bindings/input/linux-event-codes.h>
192 +
193 +/ {
194 + #address-cells = <1>;
195 + #size-cells = <1>;
196 + model = "H3C Magic NX30 Pro";
197 + compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
198 +
199 + chosen {
200 + stdout-path = &uart0;
201 + tick-timer = &timer0;
202 + };
203 +
204 + memory@40000000 {
205 + device_type = "memory";
206 + reg = <0x40000000 0x10000000>;
207 + };
208 +
209 + keys {
210 + compatible = "gpio-keys";
211 +
212 + factory {
213 + label = "reset";
214 + linux,code = <KEY_RESTART>;
215 + gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
216 + };
217 +
218 + wps {
219 + label = "wps";
220 + linux,code = <KEY_WPS_BUTTON>;
221 + gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
222 + };
223 + };
224 +
225 + leds {
226 + compatible = "gpio-leds";
227 +
228 + status_red {
229 + label = "red:status";
230 + gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
231 + };
232 +
233 + status_green {
234 + label = "green:status";
235 + gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
236 + };
237 + };
238 +};
239 +
240 +&uart0 {
241 + mediatek,force-highspeed;
242 + status = "okay";
243 +};
244 +
245 +&uart1 {
246 + pinctrl-names = "default";
247 + pinctrl-0 = <&uart1_pins>;
248 + status = "disabled";
249 +};
250 +
251 +&eth {
252 + status = "okay";
253 + mediatek,gmac-id = <0>;
254 + phy-mode = "2500base-x";
255 + mediatek,switch = "mt7531";
256 + reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
257 +
258 + fixed-link {
259 + speed = <2500>;
260 + full-duplex;
261 + };
262 +};
263 +
264 +&pinctrl {
265 + spi_flash_pins: spi0-pins-func-1 {
266 + mux {
267 + function = "flash";
268 + groups = "spi0", "spi0_wp_hold";
269 + };
270 +
271 + conf-pu {
272 + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
273 + drive-strength = <MTK_DRIVE_8mA>;
274 + bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
275 + };
276 +
277 + conf-pd {
278 + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
279 + drive-strength = <MTK_DRIVE_8mA>;
280 + bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
281 + };
282 + };
283 +
284 + spic_pins: spi1-pins-func-1 {
285 + mux {
286 + function = "spi";
287 + groups = "spi1_1";
288 + };
289 + };
290 +
291 + uart1_pins: spi1-pins-func-3 {
292 + mux {
293 + function = "uart";
294 + groups = "uart1_2";
295 + };
296 + };
297 +
298 + pwm_pins: pwm0-pins-func-1 {
299 + mux {
300 + function = "pwm";
301 + groups = "pwm0_1", "pwm1_0";
302 + };
303 + };
304 +};
305 +
306 +&pwm {
307 + pinctrl-names = "default";
308 + pinctrl-0 = <&pwm_pins>;
309 + status = "okay";
310 +};
311 +
312 +&spi0 {
313 + #address-cells = <1>;
314 + #size-cells = <0>;
315 + pinctrl-names = "default";
316 + pinctrl-0 = <&spi_flash_pins>;
317 + status = "okay";
318 + must_tx;
319 + enhance_timing;
320 + dma_ext;
321 + ipm_design;
322 + support_quad;
323 + tick_dly = <2>;
324 + sample_sel = <0>;
325 +
326 + spi_nand@0 {
327 + compatible = "spi-nand";
328 + reg = <0>;
329 + spi-max-frequency = <52000000>;
330 +
331 + partitions {
332 + compatible = "fixed-partitions";
333 + #address-cells = <1>;
334 + #size-cells = <1>;
335 +
336 + partition@0 {
337 + label = "bl2";
338 + reg = <0x0000000 0x0100000>;
339 + };
340 +
341 + partition@100000 {
342 + label = "orig-env";
343 + reg = <0x0100000 0x0080000>;
344 + };
345 +
346 + partition@180000 {
347 + label = "factory";
348 + reg = <0x0180000 0x0200000>;
349 + };
350 +
351 + partition@380000 {
352 + label = "fip";
353 + reg = <0x0380000 0x0200000>;
354 + };
355 +
356 + partition@580000 {
357 + label = "ubi";
358 + reg = <0x0580000 0x4000000>;
359 + };
360 +
361 + partition@4580000 {
362 + label = "pdt_data";
363 + reg = <0x4580000 0x0600000>;
364 + };
365 +
366 + partition@4b80000 {
367 + label = "pdt_data_1";
368 + reg = <0x4b80000 0x0600000>;
369 + };
370 +
371 + partition@5180000 {
372 + label = "exp";
373 + reg = <0x5180000 0x0100000>;
374 + };
375 +
376 + partition@5280000 {
377 + label = "plugin";
378 + reg = <0x5280000 0x2580000>;
379 + };
380 + };
381 + };
382 +};
383 +
384 +&watchdog {
385 + status = "disabled";
386 +};
387 --- /dev/null
388 +++ b/h3c_magic-nx30-pro_env
389 @@ -0,0 +1,56 @@
390 +ipaddr=192.168.1.1
391 +serverip=192.168.1.254
392 +loadaddr=0x46000000
393 +console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
394 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
395 +bootconf=config-1
396 +bootdelay=0
397 +bootfile=openwrt-mediatek-filogic-h3c_magic-nx30-pro-initramfs-recovery.itb
398 +bootfile_bl2=openwrt-mediatek-filogic-h3c_magic-nx30-pro-preloader.bin
399 +bootfile_fip=openwrt-mediatek-filogic-h3c_magic-nx30-pro-bl31-uboot.fip
400 +bootfile_upg=openwrt-mediatek-filogic-h3c_magic-nx30-pro-squashfs-sysupgrade.itb
401 +bootled_pwr=green:status
402 +bootled_rec=red:status
403 +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
404 +bootmenu_default=0
405 +bootmenu_delay=0
406 +bootmenu_title= \e[0;34m( ( ( \e[1;39mOpenWrt\e[0;34m ) ) )
407 +bootmenu_0=Initialize environment.=run _firstboot
408 +bootmenu_0d=Run default boot command.=run boot_default
409 +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
410 +bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
411 +bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
412 +bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
413 +bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
414 +bootmenu_6=\e[31mLoad BL31+U-Boot FIP via TFTP then write to NAND.\e[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
415 +bootmenu_7=\e[31mLoad BL2 preloader via TFTP then write to NAND.\e[0m=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
416 +bootmenu_8=Reboot.=reset
417 +bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
418 +boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
419 +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
420 +boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
421 +boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
422 +boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
423 +boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
424 +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
425 +boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
426 +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
427 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
428 +boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
429 +part_default=production
430 +part_recovery=recovery
431 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
432 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
433 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
434 +ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
435 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
436 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
437 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
438 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
439 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
440 +ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
441 +ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
442 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
443 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
444 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
445 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title \e[33m$ver\e[0m"