2 * ADM6996 switch driver
4 * swconfig interface based on ar8216.c
6 * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
7 * VLAN support Copyright (c) 2010, 2011 Peter Lebbing <peter@digitalbrains.com>
8 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
9 * Copyright (c) 2014 Matti Laakso <malaakso@elisanet.fi>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License v2 as published by the
13 * Free Software Foundation
16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/kernel.h>
20 #include <linux/string.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/slab.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/gpio.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/spinlock.h>
33 #include <linux/module.h>
34 #include <linux/mii.h>
35 #include <linux/platform_device.h>
36 #include <linux/platform_data/adm6996-gpio.h>
37 #include <linux/ethtool.h>
38 #include <linux/phy.h>
39 #include <linux/switch.h>
40 #include <linux/version.h>
44 #include <asm/uaccess.h>
47 MODULE_DESCRIPTION("Infineon ADM6996 Switch");
48 MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <peter@digitalbrains.com>");
49 MODULE_LICENSE("GPL");
51 static const char * const adm6996_model_name
[] =
59 struct adm6996_mib_desc
{
65 struct switch_dev dev
;
72 enum adm6996_model model
;
75 bool vlan_enabled
; /* Current hardware state */
78 u16 addr
; /* Debugging: register address to operate on */
81 u16 pvid
[ADM_NUM_PORTS
]; /* Primary VLAN ID */
84 u16 vlan_id
[ADM_NUM_VLANS
];
85 u8 vlan_table
[ADM_NUM_VLANS
]; /* bitmap, 1 = port is member */
86 u8 vlan_tagged
[ADM_NUM_VLANS
]; /* bitmap, 1 = tagged member */
88 struct mutex mib_lock
;
91 struct mutex reg_mutex
;
93 /* use abstraction for regops, we want to add gpio support in the future */
94 u16 (*read
)(struct adm6996_priv
*priv
, enum admreg reg
);
95 void (*write
)(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
);
98 #define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
99 #define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
101 #define MIB_DESC(_o, _n) \
107 static const struct adm6996_mib_desc adm6996_mibs
[] = {
108 MIB_DESC(ADM_CL0
, "RxPacket"),
109 MIB_DESC(ADM_CL6
, "RxByte"),
110 MIB_DESC(ADM_CL12
, "TxPacket"),
111 MIB_DESC(ADM_CL18
, "TxByte"),
112 MIB_DESC(ADM_CL24
, "Collision"),
113 MIB_DESC(ADM_CL30
, "Error"),
116 #define ADM6996_MIB_RXB_ID 1
117 #define ADM6996_MIB_TXB_ID 3
120 r16(struct adm6996_priv
*priv
, enum admreg reg
)
122 return priv
->read(priv
, reg
);
126 w16(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
128 priv
->write(priv
, reg
, val
);
131 /* Minimum timing constants */
132 #define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
133 #define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
134 #define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
136 static void adm6996_gpio_write(struct adm6996_priv
*priv
, int cs
, char *buf
, unsigned int bits
)
138 int i
, len
= (bits
+ 7) / 8;
141 gpio_set_value(priv
->eecs
, cs
);
142 udelay(EECK_EDGE_TIME
);
144 /* Byte assemble from MSB to LSB */
145 for (i
= 0; i
< len
; i
++) {
146 /* Bit bang from MSB to LSB */
147 for (mask
= 0x80; mask
&& bits
> 0; mask
>>= 1, bits
--) {
149 gpio_set_value(priv
->eesk
, 0);
150 udelay(EECK_EDGE_TIME
);
152 /* Output on rising edge */
153 gpio_set_value(priv
->eedi
, (mask
& buf
[i
]));
154 udelay(EEDI_SETUP_TIME
);
157 gpio_set_value(priv
->eesk
, 1);
158 udelay(EECK_EDGE_TIME
);
163 gpio_set_value(priv
->eesk
, 0);
164 udelay(EECK_EDGE_TIME
);
167 gpio_set_value(priv
->eecs
, 0);
170 static void adm6996_gpio_read(struct adm6996_priv
*priv
, int cs
, char *buf
, unsigned int bits
)
172 int i
, len
= (bits
+ 7) / 8;
175 gpio_set_value(priv
->eecs
, cs
);
176 udelay(EECK_EDGE_TIME
);
178 /* Byte assemble from MSB to LSB */
179 for (i
= 0; i
< len
; i
++) {
182 /* Bit bang from MSB to LSB */
183 for (mask
= 0x80, byte
= 0; mask
&& bits
> 0; mask
>>= 1, bits
--) {
187 gpio_set_value(priv
->eesk
, 0);
188 udelay(EECK_EDGE_TIME
);
190 /* Input on rising edge */
191 gp
= gpio_get_value(priv
->eedi
);
196 gpio_set_value(priv
->eesk
, 1);
197 udelay(EECK_EDGE_TIME
);
204 gpio_set_value(priv
->eesk
, 0);
205 udelay(EECK_EDGE_TIME
);
208 gpio_set_value(priv
->eecs
, 0);
211 /* Advance clock(s) */
212 static void adm6996_gpio_adclk(struct adm6996_priv
*priv
, int clocks
)
215 for (i
= 0; i
< clocks
; i
++) {
217 gpio_set_value(priv
->eesk
, 1);
218 udelay(EECK_EDGE_TIME
);
221 gpio_set_value(priv
->eesk
, 0);
222 udelay(EECK_EDGE_TIME
);
227 adm6996_read_gpio_reg(struct adm6996_priv
*priv
, enum admreg reg
)
229 /* cmd: 01 10 T DD R RRRRRR */
231 0xFF, 0xFF, 0xFF, 0xFF,
232 (0x06 << 4) | ((0 & 0x01) << 3 | (reg
&64)>>6),
238 /* Enable GPIO outputs with all pins to 0 */
239 gpio_direction_output(priv
->eecs
, 0);
240 gpio_direction_output(priv
->eesk
, 0);
241 gpio_direction_output(priv
->eedi
, 0);
243 adm6996_gpio_write(priv
, 0, bits
, 46);
244 gpio_direction_input(priv
->eedi
);
245 adm6996_gpio_adclk(priv
, 2);
246 adm6996_gpio_read(priv
, 0, rbits
, 32);
248 /* Extra clock(s) required per datasheet */
249 adm6996_gpio_adclk(priv
, 2);
251 /* Disable GPIO outputs */
252 gpio_direction_input(priv
->eecs
);
253 gpio_direction_input(priv
->eesk
);
255 /* EEPROM has 16-bit registers, but pumps out two registers in one request */
256 return (reg
& 0x01 ? (rbits
[0]<<8) | rbits
[1] : (rbits
[2]<<8) | (rbits
[3]));
259 /* Write chip configuration register */
260 /* Follow 93c66 timing and chip's min EEPROM timing requirement */
262 adm6996_write_gpio_reg(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
264 /* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
266 (0x05 << 5) | (reg
>> 3),
267 (reg
<< 5) | (u8
)(val
>> 11),
272 /* Enable GPIO outputs with all pins to 0 */
273 gpio_direction_output(priv
->eecs
, 0);
274 gpio_direction_output(priv
->eesk
, 0);
275 gpio_direction_output(priv
->eedi
, 0);
277 /* Write cmd. Total 27 bits */
278 adm6996_gpio_write(priv
, 1, bits
, 27);
280 /* Extra clock(s) required per datasheet */
281 adm6996_gpio_adclk(priv
, 2);
283 /* Disable GPIO outputs */
284 gpio_direction_input(priv
->eecs
);
285 gpio_direction_input(priv
->eesk
);
286 gpio_direction_input(priv
->eedi
);
290 adm6996_read_mii_reg(struct adm6996_priv
*priv
, enum admreg reg
)
292 struct phy_device
*phydev
= priv
->priv
;
293 struct mii_bus
*bus
= phydev
->mdio
.bus
;
295 return bus
->read(bus
, PHYADDR(reg
));
299 adm6996_write_mii_reg(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
301 struct phy_device
*phydev
= priv
->priv
;
302 struct mii_bus
*bus
= phydev
->mdio
.bus
;
304 bus
->write(bus
, PHYADDR(reg
), val
);
308 adm6996_set_enable_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
309 struct switch_val
*val
)
311 struct adm6996_priv
*priv
= to_adm(dev
);
313 if (val
->value
.i
> 1)
316 priv
->enable_vlan
= val
->value
.i
;
322 adm6996_get_enable_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
323 struct switch_val
*val
)
325 struct adm6996_priv
*priv
= to_adm(dev
);
327 val
->value
.i
= priv
->enable_vlan
;
335 adm6996_set_addr(struct switch_dev
*dev
, const struct switch_attr
*attr
,
336 struct switch_val
*val
)
338 struct adm6996_priv
*priv
= to_adm(dev
);
340 if (val
->value
.i
> 1023)
343 priv
->addr
= val
->value
.i
;
349 adm6996_get_addr(struct switch_dev
*dev
, const struct switch_attr
*attr
,
350 struct switch_val
*val
)
352 struct adm6996_priv
*priv
= to_adm(dev
);
354 val
->value
.i
= priv
->addr
;
360 adm6996_set_data(struct switch_dev
*dev
, const struct switch_attr
*attr
,
361 struct switch_val
*val
)
363 struct adm6996_priv
*priv
= to_adm(dev
);
365 if (val
->value
.i
> 65535)
368 w16(priv
, priv
->addr
, val
->value
.i
);
374 adm6996_get_data(struct switch_dev
*dev
, const struct switch_attr
*attr
,
375 struct switch_val
*val
)
377 struct adm6996_priv
*priv
= to_adm(dev
);
379 val
->value
.i
= r16(priv
, priv
->addr
);
384 #endif /* def DEBUG */
387 adm6996_set_pvid(struct switch_dev
*dev
, int port
, int vlan
)
389 struct adm6996_priv
*priv
= to_adm(dev
);
391 pr_devel("set_pvid port %d vlan %d\n", port
, vlan
);
393 if (vlan
> ADM_VLAN_MAX_ID
)
396 priv
->pvid
[port
] = vlan
;
402 adm6996_get_pvid(struct switch_dev
*dev
, int port
, int *vlan
)
404 struct adm6996_priv
*priv
= to_adm(dev
);
406 pr_devel("get_pvid port %d\n", port
);
407 *vlan
= priv
->pvid
[port
];
413 adm6996_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
414 struct switch_val
*val
)
416 struct adm6996_priv
*priv
= to_adm(dev
);
418 pr_devel("set_vid port %d vid %d\n", val
->port_vlan
, val
->value
.i
);
420 if (val
->value
.i
> ADM_VLAN_MAX_ID
)
423 priv
->vlan_id
[val
->port_vlan
] = val
->value
.i
;
429 adm6996_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
430 struct switch_val
*val
)
432 struct adm6996_priv
*priv
= to_adm(dev
);
434 pr_devel("get_vid port %d\n", val
->port_vlan
);
436 val
->value
.i
= priv
->vlan_id
[val
->port_vlan
];
442 adm6996_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
444 struct adm6996_priv
*priv
= to_adm(dev
);
445 u8 ports
= priv
->vlan_table
[val
->port_vlan
];
446 u8 tagged
= priv
->vlan_tagged
[val
->port_vlan
];
449 pr_devel("get_ports port_vlan %d\n", val
->port_vlan
);
453 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
454 struct switch_port
*p
;
456 if (!(ports
& (1 << i
)))
459 p
= &val
->value
.ports
[val
->len
++];
461 if (tagged
& (1 << i
))
462 p
->flags
= (1 << SWITCH_PORT_FLAG_TAGGED
);
471 adm6996_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
473 struct adm6996_priv
*priv
= to_adm(dev
);
474 u8
*ports
= &priv
->vlan_table
[val
->port_vlan
];
475 u8
*tagged
= &priv
->vlan_tagged
[val
->port_vlan
];
478 pr_devel("set_ports port_vlan %d ports", val
->port_vlan
);
483 for (i
= 0; i
< val
->len
; i
++) {
484 struct switch_port
*p
= &val
->value
.ports
[i
];
487 pr_cont(" %d%s", p
->id
,
488 ((p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
)) ? "T" :
492 if (p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
)) {
493 *tagged
|= (1 << p
->id
);
494 priv
->tagged_ports
|= (1 << p
->id
);
497 *ports
|= (1 << p
->id
);
508 * Precondition: reg_mutex must be held
511 adm6996_enable_vlan(struct adm6996_priv
*priv
)
515 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
516 reg
&= ~(ADM_OTBE_MASK
);
517 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
518 reg
= r16(priv
, ADM_IFNTE
);
519 reg
&= ~(ADM_IFNTE_MASK
);
520 w16(priv
, ADM_IFNTE
, reg
);
521 reg
= r16(priv
, ADM_VID_CHECK
);
522 reg
|= ADM_VID_CHECK_MASK
;
523 w16(priv
, ADM_VID_CHECK
, reg
);
524 reg
= r16(priv
, ADM_SYSC0
);
527 w16(priv
, ADM_SYSC0
, reg
);
528 reg
= r16(priv
, ADM_SYSC3
);
530 w16(priv
, ADM_SYSC3
, reg
);
534 adm6996_enable_vlan_6996l(struct adm6996_priv
*priv
)
538 reg
= r16(priv
, ADM_SYSC3
);
540 reg
|= ADM_MAC_CLONE
;
541 w16(priv
, ADM_SYSC3
, reg
);
547 * Sets VLAN mapping for port-based VLAN with all ports connected to
548 * eachother (this is also the power-on default).
550 * Precondition: reg_mutex must be held
553 adm6996_disable_vlan(struct adm6996_priv
*priv
)
558 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
559 reg
= ADM_VLAN_FILT_MEMBER_MASK
;
560 w16(priv
, ADM_VLAN_FILT_L(i
), reg
);
561 reg
= ADM_VLAN_FILT_VALID
| ADM_VLAN_FILT_VID(1);
562 w16(priv
, ADM_VLAN_FILT_H(i
), reg
);
565 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
566 reg
|= ADM_OTBE_MASK
;
567 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
568 reg
= r16(priv
, ADM_IFNTE
);
569 reg
|= ADM_IFNTE_MASK
;
570 w16(priv
, ADM_IFNTE
, reg
);
571 reg
= r16(priv
, ADM_VID_CHECK
);
572 reg
&= ~(ADM_VID_CHECK_MASK
);
573 w16(priv
, ADM_VID_CHECK
, reg
);
574 reg
= r16(priv
, ADM_SYSC0
);
577 w16(priv
, ADM_SYSC0
, reg
);
578 reg
= r16(priv
, ADM_SYSC3
);
580 w16(priv
, ADM_SYSC3
, reg
);
586 * Sets VLAN mapping for port-based VLAN with all ports connected to
587 * eachother (this is also the power-on default).
589 * Precondition: reg_mutex must be held
592 adm6996_disable_vlan_6996l(struct adm6996_priv
*priv
)
597 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
598 w16(priv
, ADM_VLAN_MAP(i
), 0);
601 reg
= r16(priv
, ADM_SYSC3
);
603 reg
&= ~(ADM_MAC_CLONE
);
604 w16(priv
, ADM_SYSC3
, reg
);
608 * Precondition: reg_mutex must be held
611 adm6996_apply_port_pvids(struct adm6996_priv
*priv
)
616 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
617 reg
= r16(priv
, adm_portcfg
[i
]);
618 reg
&= ~(ADM_PORTCFG_PVID_MASK
);
619 reg
|= ADM_PORTCFG_PVID(priv
->pvid
[i
]);
620 if (priv
->model
== ADM6996L
) {
621 if (priv
->tagged_ports
& (1 << i
))
626 w16(priv
, adm_portcfg
[i
], reg
);
629 w16(priv
, ADM_P0_PVID
, ADM_P0_PVID_VAL(priv
->pvid
[0]));
630 w16(priv
, ADM_P1_PVID
, ADM_P1_PVID_VAL(priv
->pvid
[1]));
631 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
632 reg
&= ~(ADM_P2_PVID_MASK
);
633 reg
|= ADM_P2_PVID_VAL(priv
->pvid
[2]);
634 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
635 reg
= ADM_P3_PVID_VAL(priv
->pvid
[3]);
636 reg
|= ADM_P4_PVID_VAL(priv
->pvid
[4]);
637 w16(priv
, ADM_P3_P4_PVID
, reg
);
638 reg
= r16(priv
, ADM_P5_PVID
);
639 reg
&= ~(ADM_P2_PVID_MASK
);
640 reg
|= ADM_P5_PVID_VAL(priv
->pvid
[5]);
641 w16(priv
, ADM_P5_PVID
, reg
);
645 * Precondition: reg_mutex must be held
648 adm6996_apply_vlan_filters(struct adm6996_priv
*priv
)
654 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
655 vid
= priv
->vlan_id
[i
];
656 ports
= priv
->vlan_table
[i
];
657 tagged
= priv
->vlan_tagged
[i
];
660 /* Disable VLAN entry */
661 w16(priv
, ADM_VLAN_FILT_H(i
), 0);
662 w16(priv
, ADM_VLAN_FILT_L(i
), 0);
666 reg
= ADM_VLAN_FILT_MEMBER(ports
);
667 reg
|= ADM_VLAN_FILT_TAGGED(tagged
);
668 w16(priv
, ADM_VLAN_FILT_L(i
), reg
);
669 reg
= ADM_VLAN_FILT_VALID
| ADM_VLAN_FILT_VID(vid
);
670 w16(priv
, ADM_VLAN_FILT_H(i
), reg
);
675 adm6996_apply_vlan_filters_6996l(struct adm6996_priv
*priv
)
681 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
682 ports
= priv
->vlan_table
[i
];
685 /* Disable VLAN entry */
686 w16(priv
, ADM_VLAN_MAP(i
), 0);
689 reg
= ADM_VLAN_FILT(ports
);
690 w16(priv
, ADM_VLAN_MAP(i
), reg
);
696 adm6996_hw_apply(struct switch_dev
*dev
)
698 struct adm6996_priv
*priv
= to_adm(dev
);
700 pr_devel("hw_apply\n");
702 mutex_lock(&priv
->reg_mutex
);
704 if (!priv
->enable_vlan
) {
705 if (priv
->vlan_enabled
) {
706 if (priv
->model
== ADM6996L
)
707 adm6996_disable_vlan_6996l(priv
);
709 adm6996_disable_vlan(priv
);
710 priv
->vlan_enabled
= 0;
715 if (!priv
->vlan_enabled
) {
716 if (priv
->model
== ADM6996L
)
717 adm6996_enable_vlan_6996l(priv
);
719 adm6996_enable_vlan(priv
);
720 priv
->vlan_enabled
= 1;
723 adm6996_apply_port_pvids(priv
);
724 if (priv
->model
== ADM6996L
)
725 adm6996_apply_vlan_filters_6996l(priv
);
727 adm6996_apply_vlan_filters(priv
);
730 mutex_unlock(&priv
->reg_mutex
);
738 * The ADM6996 can't do a software-initiated reset, so we just initialise the
739 * registers we support in this driver.
741 * Precondition: reg_mutex must be held
744 adm6996_perform_reset (struct adm6996_priv
*priv
)
748 /* initialize port and vlan settings */
749 for (i
= 0; i
< ADM_NUM_PORTS
- 1; i
++) {
750 w16(priv
, adm_portcfg
[i
], ADM_PORTCFG_INIT
|
751 ADM_PORTCFG_PVID(0));
753 w16(priv
, adm_portcfg
[5], ADM_PORTCFG_CPU
);
755 if (priv
->model
== ADM6996M
|| priv
->model
== ADM6996FC
) {
756 /* reset all PHY ports */
757 for (i
= 0; i
< ADM_PHY_PORTS
; i
++) {
758 w16(priv
, ADM_PHY_PORT(i
), ADM_PHYCFG_INIT
);
762 priv
->enable_vlan
= 0;
763 priv
->vlan_enabled
= 0;
765 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
769 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
770 priv
->vlan_id
[i
] = i
;
771 priv
->vlan_table
[i
] = 0;
772 priv
->vlan_tagged
[i
] = 0;
775 if (priv
->model
== ADM6996M
) {
776 /* Clear VLAN priority map so prio's are unused */
777 w16 (priv
, ADM_VLAN_PRIOMAP
, 0);
779 adm6996_disable_vlan(priv
);
780 adm6996_apply_port_pvids(priv
);
781 } else if (priv
->model
== ADM6996L
) {
782 /* Clear VLAN priority map so prio's are unused */
783 w16 (priv
, ADM_VLAN_PRIOMAP
, 0);
785 adm6996_disable_vlan_6996l(priv
);
786 adm6996_apply_port_pvids(priv
);
791 adm6996_reset_switch(struct switch_dev
*dev
)
793 struct adm6996_priv
*priv
= to_adm(dev
);
797 mutex_lock(&priv
->reg_mutex
);
798 adm6996_perform_reset (priv
);
799 mutex_unlock(&priv
->reg_mutex
);
804 adm6996_get_port_link(struct switch_dev
*dev
, int port
,
805 struct switch_port_link
*link
)
807 struct adm6996_priv
*priv
= to_adm(dev
);
811 if (port
>= ADM_NUM_PORTS
)
816 reg
= r16(priv
, ADM_PS0
);
819 reg
= r16(priv
, ADM_PS0
);
823 reg
= r16(priv
, ADM_PS1
);
826 reg
= r16(priv
, ADM_PS1
);
830 reg
= r16(priv
, ADM_PS1
);
834 reg
= r16(priv
, ADM_PS2
);
835 /* Bits 0, 1, 3 and 4. */
836 reg
= (reg
& 3) | ((reg
& 24) >> 1);
842 link
->link
= reg
& ADM_PS_LS
;
846 link
->duplex
= reg
& ADM_PS_DS
;
847 link
->tx_flow
= reg
& ADM_PS_FCS
;
848 link
->rx_flow
= reg
& ADM_PS_FCS
;
850 link
->speed
= SWITCH_PORT_SPEED_100
;
852 link
->speed
= SWITCH_PORT_SPEED_10
;
858 adm6996_sw_get_port_mib(struct switch_dev
*dev
,
859 const struct switch_attr
*attr
,
860 struct switch_val
*val
)
862 struct adm6996_priv
*priv
= to_adm(dev
);
864 char *buf
= priv
->buf
;
868 port
= val
->port_vlan
;
869 if (port
>= ADM_NUM_PORTS
)
872 mutex_lock(&priv
->mib_lock
);
874 len
+= snprintf(buf
+ len
, sizeof(priv
->buf
) - len
,
875 "Port %d MIB counters\n",
878 for (i
= 0; i
< ARRAY_SIZE(adm6996_mibs
); i
++) {
879 reg
= r16(priv
, adm6996_mibs
[i
].offset
+ ADM_OFFSET_PORT(port
));
880 reg
+= r16(priv
, adm6996_mibs
[i
].offset
+ ADM_OFFSET_PORT(port
) + 1) << 16;
881 len
+= snprintf(buf
+ len
, sizeof(priv
->buf
) - len
,
883 adm6996_mibs
[i
].name
,
887 mutex_unlock(&priv
->mib_lock
);
896 adm6996_get_port_stats(struct switch_dev
*dev
, int port
,
897 struct switch_port_stats
*stats
)
899 struct adm6996_priv
*priv
= to_adm(dev
);
903 if (port
>= ADM_NUM_PORTS
)
906 mutex_lock(&priv
->mib_lock
);
908 id
= ADM6996_MIB_TXB_ID
;
909 reg
= r16(priv
, adm6996_mibs
[id
].offset
+ ADM_OFFSET_PORT(port
));
910 reg
+= r16(priv
, adm6996_mibs
[id
].offset
+ ADM_OFFSET_PORT(port
) + 1) << 16;
911 stats
->tx_bytes
= reg
;
913 id
= ADM6996_MIB_RXB_ID
;
914 reg
= r16(priv
, adm6996_mibs
[id
].offset
+ ADM_OFFSET_PORT(port
));
915 reg
+= r16(priv
, adm6996_mibs
[id
].offset
+ ADM_OFFSET_PORT(port
) + 1) << 16;
916 stats
->rx_bytes
= reg
;
918 mutex_unlock(&priv
->mib_lock
);
923 static struct switch_attr adm6996_globals
[] = {
925 .type
= SWITCH_TYPE_INT
,
926 .name
= "enable_vlan",
927 .description
= "Enable VLANs",
928 .set
= adm6996_set_enable_vlan
,
929 .get
= adm6996_get_enable_vlan
,
933 .type
= SWITCH_TYPE_INT
,
936 "Direct register access: set register address (0 - 1023)",
937 .set
= adm6996_set_addr
,
938 .get
= adm6996_get_addr
,
941 .type
= SWITCH_TYPE_INT
,
944 "Direct register access: read/write to register (0 - 65535)",
945 .set
= adm6996_set_data
,
946 .get
= adm6996_get_data
,
948 #endif /* def DEBUG */
951 static struct switch_attr adm6996_port
[] = {
953 .type
= SWITCH_TYPE_STRING
,
955 .description
= "Get port's MIB counters",
957 .get
= adm6996_sw_get_port_mib
,
961 static struct switch_attr adm6996_vlan
[] = {
963 .type
= SWITCH_TYPE_INT
,
965 .description
= "VLAN ID",
966 .set
= adm6996_set_vid
,
967 .get
= adm6996_get_vid
,
971 static struct switch_dev_ops adm6996_ops
= {
973 .attr
= adm6996_globals
,
974 .n_attr
= ARRAY_SIZE(adm6996_globals
),
977 .attr
= adm6996_port
,
978 .n_attr
= ARRAY_SIZE(adm6996_port
),
981 .attr
= adm6996_vlan
,
982 .n_attr
= ARRAY_SIZE(adm6996_vlan
),
984 .get_port_pvid
= adm6996_get_pvid
,
985 .set_port_pvid
= adm6996_set_pvid
,
986 .get_vlan_ports
= adm6996_get_ports
,
987 .set_vlan_ports
= adm6996_set_ports
,
988 .apply_config
= adm6996_hw_apply
,
989 .reset_switch
= adm6996_reset_switch
,
990 .get_port_link
= adm6996_get_port_link
,
991 .get_port_stats
= adm6996_get_port_stats
,
994 static int adm6996_switch_init(struct adm6996_priv
*priv
, const char *alias
, struct net_device
*netdev
)
996 struct switch_dev
*swdev
;
1000 /* Detect type of chip */
1001 old
= r16(priv
, ADM_VID_CHECK
);
1002 test
= old
^ (1 << 12);
1003 w16(priv
, ADM_VID_CHECK
, test
);
1004 test
^= r16(priv
, ADM_VID_CHECK
);
1005 if (test
& (1 << 12)) {
1007 * Bit 12 of this register is read-only.
1008 * This is the FC model.
1010 priv
->model
= ADM6996FC
;
1012 /* Bit 12 is read-write. This is the M model. */
1013 priv
->model
= ADM6996M
;
1014 w16(priv
, ADM_VID_CHECK
, old
);
1019 swdev
->name
= (adm6996_model_name
[priv
->model
]);
1020 swdev
->cpu_port
= ADM_CPU_PORT
;
1021 swdev
->ports
= ADM_NUM_PORTS
;
1022 swdev
->vlans
= ADM_NUM_VLANS
;
1023 swdev
->ops
= &adm6996_ops
;
1024 swdev
->alias
= alias
;
1026 /* The ADM6996L connected through GPIOs does not support any switch
1028 if (priv
->model
== ADM6996L
) {
1029 adm6996_ops
.attr_port
.n_attr
= 0;
1030 adm6996_ops
.get_port_link
= NULL
;
1033 pr_info ("%s: %s model PHY found.\n", alias
, swdev
->name
);
1035 mutex_lock(&priv
->reg_mutex
);
1036 adm6996_perform_reset (priv
);
1037 mutex_unlock(&priv
->reg_mutex
);
1039 if (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
) {
1040 return register_switch(swdev
, netdev
);
1046 static int adm6996_config_init(struct phy_device
*pdev
)
1048 struct adm6996_priv
*priv
;
1051 linkmode_zero(pdev
->supported
);
1052 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT
, pdev
->supported
);
1053 linkmode_copy(pdev
->advertising
, pdev
->supported
);
1055 if (pdev
->mdio
.addr
!= 0) {
1056 pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
1057 , pdev
->attached_dev
->name
, pdev
->mdio
.addr
);
1061 priv
= devm_kzalloc(&pdev
->mdio
.dev
, sizeof(struct adm6996_priv
), GFP_KERNEL
);
1065 mutex_init(&priv
->reg_mutex
);
1066 mutex_init(&priv
->mib_lock
);
1068 priv
->read
= adm6996_read_mii_reg
;
1069 priv
->write
= adm6996_write_mii_reg
;
1071 ret
= adm6996_switch_init(priv
, pdev
->attached_dev
->name
, pdev
->attached_dev
);
1081 * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
1083 static int adm6996_read_status(struct phy_device
*phydev
)
1085 phydev
->speed
= SPEED_100
;
1086 phydev
->duplex
= DUPLEX_FULL
;
1089 phydev
->state
= PHY_RUNNING
;
1090 netif_carrier_on(phydev
->attached_dev
);
1091 phydev
->adjust_link(phydev
->attached_dev
);
1097 * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
1099 static int adm6996_config_aneg(struct phy_device
*phydev
)
1104 static int adm6996_fixup(struct phy_device
*dev
)
1106 struct mii_bus
*bus
= dev
->mdio
.bus
;
1109 /* Our custom registers are at PHY addresses 0-10. Claim those. */
1110 if (dev
->mdio
.addr
> 10)
1113 /* look for the switch on the bus */
1114 reg
= bus
->read(bus
, PHYADDR(ADM_SIG0
)) & ADM_SIG0_MASK
;
1115 if (reg
!= ADM_SIG0_VAL
)
1118 reg
= bus
->read(bus
, PHYADDR(ADM_SIG1
)) & ADM_SIG1_MASK
;
1119 if (reg
!= ADM_SIG1_VAL
)
1122 dev
->phy_id
= (ADM_SIG0_VAL
<< 16) | ADM_SIG1_VAL
;
1127 static int adm6996_probe(struct phy_device
*pdev
)
1132 static void adm6996_remove(struct phy_device
*pdev
)
1134 struct adm6996_priv
*priv
= phy_to_adm(pdev
);
1136 if (priv
&& (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
))
1137 unregister_switch(&priv
->dev
);
1140 static int adm6996_soft_reset(struct phy_device
*phydev
)
1142 /* we don't need an extra reset */
1146 static struct phy_driver adm6996_phy_driver
= {
1147 .name
= "Infineon ADM6996",
1148 .phy_id
= (ADM_SIG0_VAL
<< 16) | ADM_SIG1_VAL
,
1149 .phy_id_mask
= 0xffffffff,
1150 .features
= PHY_BASIC_FEATURES
,
1151 .probe
= adm6996_probe
,
1152 .remove
= adm6996_remove
,
1153 .config_init
= &adm6996_config_init
,
1154 .config_aneg
= &adm6996_config_aneg
,
1155 .read_status
= &adm6996_read_status
,
1156 .soft_reset
= adm6996_soft_reset
,
1159 static int adm6996_gpio_probe(struct platform_device
*pdev
)
1161 struct adm6996_gpio_platform_data
*pdata
= pdev
->dev
.platform_data
;
1162 struct adm6996_priv
*priv
;
1168 priv
= devm_kzalloc(&pdev
->dev
, sizeof(struct adm6996_priv
), GFP_KERNEL
);
1172 mutex_init(&priv
->reg_mutex
);
1173 mutex_init(&priv
->mib_lock
);
1175 priv
->eecs
= pdata
->eecs
;
1176 priv
->eedi
= pdata
->eedi
;
1177 priv
->eesk
= pdata
->eesk
;
1179 priv
->model
= pdata
->model
;
1180 priv
->read
= adm6996_read_gpio_reg
;
1181 priv
->write
= adm6996_write_gpio_reg
;
1183 ret
= devm_gpio_request(&pdev
->dev
, priv
->eecs
, "adm_eecs");
1186 ret
= devm_gpio_request(&pdev
->dev
, priv
->eedi
, "adm_eedi");
1189 ret
= devm_gpio_request(&pdev
->dev
, priv
->eesk
, "adm_eesk");
1193 ret
= adm6996_switch_init(priv
, dev_name(&pdev
->dev
), NULL
);
1197 platform_set_drvdata(pdev
, priv
);
1202 static int adm6996_gpio_remove(struct platform_device
*pdev
)
1204 struct adm6996_priv
*priv
= platform_get_drvdata(pdev
);
1206 if (priv
&& (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
))
1207 unregister_switch(&priv
->dev
);
1212 static struct platform_driver adm6996_gpio_driver
= {
1213 .probe
= adm6996_gpio_probe
,
1214 .remove
= adm6996_gpio_remove
,
1216 .name
= "adm6996_gpio",
1220 static int __init
adm6996_init(void)
1224 phy_register_fixup_for_id(PHY_ANY_ID
, adm6996_fixup
);
1225 err
= phy_driver_register(&adm6996_phy_driver
, THIS_MODULE
);
1229 err
= platform_driver_register(&adm6996_gpio_driver
);
1231 phy_driver_unregister(&adm6996_phy_driver
);
1236 static void __exit
adm6996_exit(void)
1238 platform_driver_unregister(&adm6996_gpio_driver
);
1239 phy_driver_unregister(&adm6996_phy_driver
);
1242 module_init(adm6996_init
);
1243 module_exit(adm6996_exit
);