ath79: WNDR3700 v1/v2: make u-boot env partition writable
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar7161_dlink_dir-825-b1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar7100.dtsi"
8
9 / {
10 compatible = "dlink,dir-825-b1", "qca,ar7161";
11 model = "D-Link DIR825B1";
12
13 aliases {
14 led-boot = &orange_power;
15 led-failsafe = &orange_power;
16 led-running = &blue_power;
17 led-upgrade = &orange_power;
18 };
19
20 chosen {
21 bootargs = "console=ttyS0,115200";
22 };
23
24 extosc: ref {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-output-names = "ref";
28 clock-frequency = <40000000>;
29 };
30
31 leds {
32 compatible = "gpio-leds";
33 blue_usb {
34 label = "d-link:blue:usb";
35 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
36 trigger-sources = <&usb_ochi_port>, <&usb_echi_port>;
37 linux,default-trigger = "usbport";
38 };
39
40 orange_power: orange_power {
41 label = "d-link:orange:power";
42 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
43 default-state = "on";
44 };
45
46 blue_power: blue_power {
47 label = "d-link:blue:power";
48 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
49 };
50
51 blue_wps {
52 label = "d-link:blue:wps";
53 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
54 };
55
56 orange_planet {
57 label = "d-link:orange:planet";
58 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
59 };
60
61 blue_planet {
62 label = "d-link:blue:planet";
63 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
64 };
65 };
66
67 ath9k-leds {
68 compatible = "gpio-leds";
69
70 wlan2g {
71 label = "d-link:blue:wlan2g";
72 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
73 linux,default-trigger = "phy0tpt";
74 };
75
76 wlan5g {
77 label = "d-link:blue:wlan5g";
78 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
79 linux,default-trigger = "phy1tpt";
80 };
81 };
82
83 keys {
84 compatible = "gpio-keys-polled";
85 poll-interval = <20>;
86
87 reset {
88 label = "reset";
89 linux,code = <KEY_RESTART>;
90 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
91 debounce-interval = <60>;
92 };
93
94 wps {
95 label = "wps";
96 linux,code = <KEY_WPS_BUTTON>;
97 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
98 debounce-interval = <60>;
99 };
100 };
101
102 rtl8366s {
103 compatible = "realtek,rtl8366s";
104 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
105 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
106 realtek,initvals = <0x06 0x0108>;
107
108 mdio-bus {
109 #address-cells = <1>;
110 #size-cells = <0>;
111 status = "okay";
112
113 phy-mask = <0x10>;
114
115 phy4: ethernet-phy@4 {
116 reg = <4>;
117 phy-mode = "rgmii";
118 };
119 };
120 };
121 };
122
123
124 &usb1 {
125 #address-cells = <1>;
126 #size-cells = <0>;
127 status = "okay";
128
129 usb_ochi_port: port@1 {
130 reg = <1>;
131 #trigger-source-cells = <0>;
132 };
133 };
134
135 &usb2 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 status = "okay";
139
140 usb_echi_port: port@1 {
141 reg = <1>;
142 #trigger-source-cells = <0>;
143 };
144 };
145
146 &usb_phy {
147 status = "okay";
148 };
149
150 &pcie0 {
151 status = "okay";
152
153 ath9k0: wifi@0,11 {
154 compatible = "pci168c,0029";
155 reg = <0x8800 0 0 0 0>;
156 qca,no-eeprom;
157 #gpio-cells = <2>;
158 gpio-controller;
159 };
160
161 ath9k1: wifi@0,12 {
162 compatible = "pci168c,0029";
163 reg = <0x9000 0 0 0 0>;
164 qca,no-eeprom;
165 #gpio-cells = <2>;
166 gpio-controller;
167 };
168 };
169
170 &uart {
171 status = "okay";
172 };
173
174 &pll {
175 clocks = <&extosc>;
176 };
177
178 &spi {
179 status = "okay";
180 num-cs = <1>;
181
182 flash@0 {
183 compatible = "jedec,spi-nor";
184 reg = <0>;
185 spi-max-frequency = <25000000>;
186
187 partitions {
188 compatible = "fixed-partitions";
189 #address-cells = <1>;
190 #size-cells = <1>;
191
192 partition@0 {
193 label = "u-boot";
194 reg = <0x000000 0x040000>;
195 read-only;
196 };
197
198 partition@40000 {
199 label = "config";
200 reg = <0x040000 0x010000>;
201 read-only;
202 };
203
204 partition@50000 {
205 compatible = "denx,uimage";
206 label = "firmware";
207 reg = <0x050000 0x610000>;
208 };
209
210 caldata: partition@60000 {
211 label = "caldata";
212 reg = <0x660000 0x010000>;
213 read-only;
214 };
215
216 partition@670000 {
217 label = "unknown";
218 reg = <0x670000 0x190000>;
219 read-only;
220 };
221 };
222 };
223 };
224
225
226 &eth0 {
227 status = "okay";
228 pll-data = <0x11110000 0x00001099 0x00991099>;
229
230 fixed-link {
231 speed = <1000>;
232 full-duplex;
233 };
234 };
235
236 &eth1 {
237 status = "okay";
238 pll-data = <0x11110000 0x00001099 0x00991099>;
239
240 phy-handle = <&phy4>;
241 };