mediatek: backport upstream mediatek patches
[openwrt/openwrt.git] / target / linux / mediatek / patches-4.14 / 0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch
1 From 0a84c72d1c606129b8af670cbcc73be4168ab753 Mon Sep 17 00:00:00 2001
2 From: Sean Wang <sean.wang@mediatek.com>
3 Date: Fri, 29 Dec 2017 10:36:37 +0800
4 Subject: [PATCH 217/224] arm64: dts: mt7622: add flash related device nodes
5
6 add nodes for NOR flash, parallel Nand flash with error correction code
7 support.
8
9 Signed-off-by: Sean Wang <sean.wang@mediatek.com>
10 Cc: RogerCC Lin <rogercc.lin@mediatek.com>
11 Cc: Guochun Mao <guochun.mao@mediatek.com>
12 ---
13 arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 21 +++++++++++++++++
14 arch/arm64/boot/dts/mediatek/mt7622.dtsi | 34 ++++++++++++++++++++++++++++
15 2 files changed, 55 insertions(+)
16
17 diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
18 index ba6a79caca21..48c5ba472721 100644
19 --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
20 +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
21 @@ -235,6 +235,10 @@
22 };
23 };
24
25 +&bch {
26 + status = "disabled";
27 +};
28 +
29 &btif {
30 status = "okay";
31 };
32 @@ -257,6 +261,23 @@
33 status = "okay";
34 };
35
36 +&nandc {
37 + pinctrl-names = "default";
38 + pinctrl-0 = <&parallel_nand_pins>;
39 + status = "disabled";
40 +};
41 +
42 +&nor_flash {
43 + pinctrl-names = "default";
44 + pinctrl-0 = <&spi_nor_pins>;
45 + status = "disabled";
46 +
47 + flash@0 {
48 + compatible = "jedec,spi-nor";
49 + reg = <0>;
50 + };
51 +};
52 +
53 &pwm {
54 pinctrl-names = "default";
55 pinctrl-0 = <&pwm7_pins>;
56 diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
57 index 448cd366995b..d287d75e1a54 100644
58 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
59 +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
60 @@ -468,6 +468,40 @@
61 status = "disabled";
62 };
63
64 + nandc: nfi@1100d000 {
65 + compatible = "mediatek,mt7622-nfc";
66 + reg = <0 0x1100D000 0 0x1000>;
67 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
68 + clocks = <&pericfg CLK_PERI_NFI_PD>,
69 + <&pericfg CLK_PERI_SNFI_PD>;
70 + clock-names = "nfi_clk", "pad_clk";
71 + ecc-engine = <&bch>;
72 + #address-cells = <1>;
73 + #size-cells = <0>;
74 + status = "disabled";
75 + };
76 +
77 + bch: ecc@1100e000 {
78 + compatible = "mediatek,mt7622-ecc";
79 + reg = <0 0x1100e000 0 0x1000>;
80 + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
81 + clocks = <&pericfg CLK_PERI_NFIECC_PD>;
82 + clock-names = "nfiecc_clk";
83 + status = "disabled";
84 + };
85 +
86 + nor_flash: spi@11014000 {
87 + compatible = "mediatek,mt7622-nor",
88 + "mediatek,mt8173-nor";
89 + reg = <0 0x11014000 0 0xe0>;
90 + clocks = <&pericfg CLK_PERI_FLASH_PD>,
91 + <&topckgen CLK_TOP_FLASH_SEL>;
92 + clock-names = "spi", "sf";
93 + #address-cells = <1>;
94 + #size-cells = <0>;
95 + status = "disabled";
96 + };
97 +
98 spi1: spi@11016000 {
99 compatible = "mediatek,mt7622-spi";
100 reg = <0 0x11016000 0 0x100>;
101 --
102 2.11.0
103