target/linux/ramips/dts/mt7620a_wevo_air-duo.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         compatible = "wevo,air-duo", "ralink,mt7620a-soc";
  11         model = "WeVO AIR DUO";
  12
  13         aliases {
  14                 led-boot = &led_status;
  15                 led-failsafe = &led_status;
  16                 led-running = &led_status;
  17                 led-upgrade = &led_status;
  18                 label-mac-device = &ethernet;
  19         };
  20
  21         leds {
  22                 compatible = "gpio-leds";
  23
  24                 led_status: led-0 {
  25                         label = "blue:status";
  26                         color = <LED_COLOR_ID_BLUE>;
  27                         function = LED_FUNCTION_STATUS;
  28                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  29                 };
  30
  31                 led-1 {
  32                         color = <LED_COLOR_ID_BLUE>;
  33                         function = LED_FUNCTION_WPS;
  34                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  35                 };
  36         };
  37
  38         keys {
  39                 compatible = "gpio-keys";
  40
  41                 wps {
  42                         label = "wps";
  43                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  44                         linux,code = <KEY_WPS_BUTTON>;
  45                 };
  46
  47                 reset {
  48                         label = "reset";
  49                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  50                         linux,code = <KEY_RESTART>;
  51                 };
  52         };
  53 };
  54
  55 &gpio1 {
  56         status = "okay";
  57 };
  58
  59 &spi0 {
  60         status = "okay";
  61
  62         flash@0 {
  63                 compatible = "jedec,spi-nor";
  64                 reg = <0>;
  65                 spi-max-frequency = <50000000>;
  66
  67                 partitions {
  68                         compatible = "fixed-partitions";
  69                         #address-cells = <1>;
  70                         #size-cells = <1>;
  71
  72                         partition@0 {
  73                                 label = "u-boot";
  74                                 reg = <0x0 0x30000>;
  75                                 read-only;
  76                         };
  77
  78                         partition@30000 {
  79                                 label = "config";
  80                                 reg = <0x30000 0x10000>;
  81                                 read-only;
  82                         };
  83
  84                         factory: partition@40000 {
  85                                 label = "factory";
  86                                 reg = <0x40000 0x10000>;
  87                                 read-only;
  88
  89                                 nvmem-layout {
  90                                         compatible = "fixed-layout";
  91                                         #address-cells = <1>;
  92                                         #size-cells = <1>;
  93
  94                                         eeprom_factory_0: eeprom@0 {
  95                                                 reg = <0x0 0x200>;
  96                                         };
  97
  98                                         eeprom_factory_8000: eeprom@8000 {
  99                                                 reg = <0x8000 0x200>;
 100                                         };
 101
 102                                         macaddr_factory_4: macaddr@4 {
 103                                                 reg = <0x4 0x6>;
 104                                         };
 105                                 };
 106                         };
 107
 108                         partition@50000 {
 109                                 compatible = "denx,uimage";
 110                                 label = "firmware";
 111                                 reg = <0x50000 0xeb0000>;
 112                         };
 113
 114                         partition@f00000 {
 115                                 label = "db";
 116                                 reg = <0xf00000 0x100000>;
 117                                 read-only;
 118                         };
 119                 };
 120         };
 121 };
 122
 123 &state_default {
 124         gpio {
 125                 groups = "i2c", "uartf", "spi refclk";
 126                 function = "gpio";
 127         };
 128 };
 129
 130 &ethernet {
 131         pinctrl-names = "default";
 132         pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 133         nvmem-cells = <&macaddr_factory_4>;
 134         nvmem-cell-names = "mac-address";
 135
 136         port@5 {
 137                 status = "okay";
 138                 mediatek,fixed-link = <1000 1 1 1>;
 139                 phy-mode = "rgmii";
 140         };
 141
 142         mdio-bus {
 143                 status = "okay";
 144
 145                 ethernet-phy@0 {
 146                         reg = <0>;
 147                         phy-mode = "rgmii";
 148                 };
 149
 150                 ethernet-phy@1 {
 151                         reg = <1>;
 152                         phy-mode = "rgmii";
 153                 };
 154
 155                 ethernet-phy@2 {
 156                         reg = <2>;
 157                         phy-mode = "rgmii";
 158                 };
 159
 160                 ethernet-phy@3 {
 161                         reg = <3>;
 162                         phy-mode = "rgmii";
 163                 };
 164
 165                 ethernet-phy@4 {
 166                         reg = <4>;
 167                         phy-mode = "rgmii";
 168                 };
 169
 170                 ethernet-phy@1f {
 171                         reg = <0x1f>;
 172                         phy-mode = "rgmii";
 173                 };
 174         };
 175 };
 176
 177 &gsw {
 178         mediatek,ephy-base = /bits/ 8 <12>;
 179 };
 180
 181 &ehci {
 182         status = "okay";
 183 };
 184
 185 &ohci {
 186         status = "okay";
 187 };
 188
 189 &pcie {
 190         status = "okay";
 191 };
 192
 193 &pcie0 {
 194         wifi@0,0 {
 195                 compatible = "mediatek,mt76";
 196                 reg = <0x0000 0 0 0 0>;
 197                 nvmem-cells = <&eeprom_factory_8000>;
 198                 nvmem-cell-names = "eeprom";
 199                 ieee80211-freq-limit = <5000000 6000000>;
 200
 201                 led {
 202                         led-sources = <2>;
 203                         led-active-low;
 204                 };
 205         };
 206 };
 207
 208 &wmac {
 209         pinctrl-names = "default";
 210         pinctrl-0 = <&wled_pins>;
 211         nvmem-cells = <&eeprom_factory_0>;
 212         nvmem-cell-names = "eeprom";
 213 };