target/linux/ramips/dts/mt7628an.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "mediatek,mt7628an-soc";
   7
   8         cpus {
   9                 #address-cells = <1>;
  10                 #size-cells = <0>;
  11
  12                 cpu@0 {
  13                         compatible = "mips,mips24KEc";
  14                         reg = <0>;
  15                 };
  16         };
  17
  18         chosen {
  19                 bootargs = "console=ttyS0,57600";
  20         };
  21
  22         aliases {
  23                 serial0 = &uartlite;
  24         };
  25
  26         cpuintc: cpuintc {
  27                 #address-cells = <0>;
  28                 #interrupt-cells = <1>;
  29                 interrupt-controller;
  30                 compatible = "mti,cpu-interrupt-controller";
  31         };
  32
  33         palmbus: palmbus@10000000 {
  34                 compatible = "palmbus";
  35                 reg = <0x10000000 0x200000>;
  36                 ranges = <0x0 0x10000000 0x1FFFFF>;
  37
  38                 #address-cells = <1>;
  39                 #size-cells = <1>;
  40
  41                 sysc: sysc@0 {
  42                         compatible = "ralink,mt7620a-sysc", "syscon";
  43                         reg = <0x0 0x100>;
  44                 };
  45
  46                 watchdog: watchdog@100 {
  47                         compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
  48                         reg = <0x100 0x30>;
  49
  50                         resets = <&rstctrl 8>;
  51                         reset-names = "wdt";
  52
  53                         interrupt-parent = <&intc>;
  54                         interrupts = <24>;
  55                 };
  56
  57                 intc: intc@200 {
  58                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  59                         reg = <0x200 0x100>;
  60
  61                         resets = <&rstctrl 9>;
  62                         reset-names = "intc";
  63
  64                         interrupt-controller;
  65                         #interrupt-cells = <1>;
  66
  67                         interrupt-parent = <&cpuintc>;
  68                         interrupts = <2>;
  69
  70                         ralink,intc-registers = <0x9c 0xa0
  71                                                  0x6c 0xa4
  72                                                  0x80 0x78>;
  73                 };
  74
  75                 memc: memc@300 {
  76                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  77                         reg = <0x300 0x100>;
  78
  79                         resets = <&rstctrl 20>;
  80                         reset-names = "mc";
  81
  82                         interrupt-parent = <&intc>;
  83                         interrupts = <3>;
  84                 };
  85
  86                 gpio: gpio@600 {
  87                         compatible = "mediatek,mt7621-gpio";
  88                         reg = <0x600 0x100>;
  89
  90                         interrupt-parent = <&intc>;
  91                         interrupts = <6>;
  92
  93                         #interrupt-cells = <2>;
  94                         interrupt-controller;
  95
  96                         gpio-controller;
  97                         #gpio-cells = <2>;
  98                 };
  99
 100                 i2c: i2c@900 {
 101                         compatible = "mediatek,mt7621-i2c";
 102                         reg = <0x900 0x100>;
 103
 104                         resets = <&rstctrl 16>;
 105                         reset-names = "i2c";
 106
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109
 110                         status = "disabled";
 111
 112                         pinctrl-names = "default";
 113                         pinctrl-0 = <&i2c_pins>;
 114                 };
 115
 116                 i2s: i2s@a00 {
 117                         compatible = "mediatek,mt7628-i2s";
 118                         reg = <0xa00 0x100>;
 119
 120                         resets = <&rstctrl 17>;
 121                         reset-names = "i2s";
 122
 123                         interrupt-parent = <&intc>;
 124                         interrupts = <10>;
 125
 126                         txdma-req = <2>;
 127                         rxdma-req = <3>;
 128
 129                         dmas = <&gdma 4>,
 130                                 <&gdma 6>;
 131                         dma-names = "tx", "rx";
 132
 133                         status = "disabled";
 134                 };
 135
 136                 spi0: spi@b00 {
 137                         compatible = "ralink,mt7621-spi";
 138                         reg = <0xb00 0x100>;
 139
 140                         resets = <&rstctrl 18>;
 141                         reset-names = "spi";
 142
 143                         #address-cells = <1>;
 144                         #size-cells = <0>;
 145
 146                         pinctrl-names = "default";
 147                         pinctrl-0 = <&spi_pins>;
 148
 149                         status = "disabled";
 150                 };
 151
 152                 uartlite: uartlite@c00 {
 153                         compatible = "ns16550a";
 154                         reg = <0xc00 0x100>;
 155
 156                         reg-shift = <2>;
 157                         reg-io-width = <4>;
 158                         no-loopback-test;
 159
 160                         clock-frequency = <40000000>;
 161
 162                         resets = <&rstctrl 12>;
 163                         reset-names = "uartl";
 164
 165                         interrupt-parent = <&intc>;
 166                         interrupts = <20>;
 167
 168                         pinctrl-names = "default";
 169                         pinctrl-0 = <&uart0_pins>;
 170                 };
 171
 172                 uart1: uart1@d00 {
 173                         compatible = "ns16550a";
 174                         reg = <0xd00 0x100>;
 175
 176                         reg-shift = <2>;
 177                         reg-io-width = <4>;
 178                         no-loopback-test;
 179
 180                         clock-frequency = <40000000>;
 181
 182                         resets = <&rstctrl 19>;
 183                         reset-names = "uart1";
 184
 185                         interrupt-parent = <&intc>;
 186                         interrupts = <21>;
 187
 188                         pinctrl-names = "default";
 189                         pinctrl-0 = <&uart1_pins>;
 190
 191                         status = "disabled";
 192                 };
 193
 194                 uart2: uart2@e00 {
 195                         compatible = "ns16550a";
 196                         reg = <0xe00 0x100>;
 197
 198                         reg-shift = <2>;
 199                         reg-io-width = <4>;
 200                         no-loopback-test;
 201
 202                         clock-frequency = <40000000>;
 203
 204                         resets = <&rstctrl 20>;
 205                         reset-names = "uart2";
 206
 207                         interrupt-parent = <&intc>;
 208                         interrupts = <22>;
 209
 210                         pinctrl-names = "default";
 211                         pinctrl-0 = <&uart2_pins>;
 212
 213                         status = "disabled";
 214                 };
 215
 216                 pwm: pwm@5000 {
 217                         compatible = "mediatek,mt7628-pwm";
 218                         reg = <0x5000 0x1000>;
 219                         #pwm-cells = <2>;
 220
 221                         resets = <&rstctrl 31>;
 222                         reset-names = "pwm";
 223
 224                         pinctrl-names = "default";
 225                         pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
 226
 227                         status = "disabled";
 228                 };
 229
 230                 pcm: pcm@2000 {
 231                         compatible = "ralink,mt7620a-pcm";
 232                         reg = <0x2000 0x800>;
 233
 234                         resets = <&rstctrl 11>;
 235                         reset-names = "pcm";
 236
 237                         interrupt-parent = <&intc>;
 238                         interrupts = <4>;
 239
 240                         status = "disabled";
 241                 };
 242
 243                 gdma: gdma@2800 {
 244                         compatible = "ralink,rt3883-gdma";
 245                         reg = <0x2800 0x800>;
 246
 247                         resets = <&rstctrl 14>;
 248                         reset-names = "dma";
 249
 250                         interrupt-parent = <&intc>;
 251                         interrupts = <7>;
 252
 253                         #dma-cells = <1>;
 254                         #dma-channels = <16>;
 255                         #dma-requests = <16>;
 256
 257                         status = "disabled";
 258                 };
 259         };
 260
 261         pinctrl: pinctrl {
 262                 compatible = "ralink,rt2880-pinmux";
 263                 pinctrl-names = "default";
 264                 pinctrl-0 = <&state_default>;
 265
 266                 state_default: pinctrl0 {
 267                 };
 268
 269                 spi_pins: spi_pins {
 270                         spi_pins {
 271                                 groups = "spi";
 272                                 function = "spi";
 273                         };
 274                 };
 275
 276                 spi_cs1_pins: spi_cs1 {
 277                         spi_cs1 {
 278                                 groups = "spi cs1";
 279                                 function = "spi cs1";
 280                         };
 281                 };
 282
 283                 i2c_pins: i2c_pins {
 284                         i2c_pins {
 285                                 groups = "i2c";
 286                                 function = "i2c";
 287                         };
 288                 };
 289
 290                 i2s_pins: i2s {
 291                         i2s {
 292                                 groups = "i2s";
 293                                 function = "i2s";
 294                         };
 295                 };
 296
 297                 uart0_pins: uartlite {
 298                         uartlite {
 299                                 groups = "uart0";
 300                                 function = "uart0";
 301                         };
 302                 };
 303
 304                 uart1_pins: uart1 {
 305                         uart1 {
 306                                 groups = "uart1";
 307                                 function = "uart1";
 308                         };
 309                 };
 310
 311                 uart2_pins: uart2 {
 312                         uart2 {
 313                                 groups = "uart2";
 314                                 function = "uart2";
 315                         };
 316                 };
 317
 318                 sdxc_pins: sdxc {
 319                         sdxc {
 320                                 groups = "sdmode";
 321                                 function = "sdxc";
 322                         };
 323                 };
 324
 325                 pwm0_pins: pwm0 {
 326                         pwm0 {
 327                                 groups = "pwm0";
 328                                 function = "pwm0";
 329                         };
 330                 };
 331
 332                 pwm1_pins: pwm1 {
 333                         pwm1 {
 334                                 groups = "pwm1";
 335                                 function = "pwm1";
 336                         };
 337                 };
 338
 339                 pcm_i2s_pins: pcm_i2s {
 340                         pcm_i2s {
 341                                 groups = "i2s";
 342                                 function = "pcm";
 343                         };
 344                 };
 345
 346                 refclk_pins: refclk {
 347                         refclk {
 348                                 groups = "refclk";
 349                                 function = "refclk";
 350                         };
 351                 };
 352         };
 353
 354         rstctrl: rstctrl {
 355                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 356                 #reset-cells = <1>;
 357         };
 358
 359         clkctrl: clkctrl {
 360                 compatible = "ralink,rt2880-clock";
 361                 #clock-cells = <1>;
 362         };
 363
 364         usbphy: usbphy@10120000 {
 365                 compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
 366                 reg = <0x10120000 0x1000>;
 367                 #phy-cells = <0>;
 368
 369                 ralink,sysctl = <&sysc>;
 370                 resets = <&rstctrl 22 &rstctrl 25>;
 371                 reset-names = "host", "device";
 372                 clocks = <&clkctrl 22 &clkctrl 25>;
 373                 clock-names = "host", "device";
 374         };
 375
 376         sdhci: sdhci@10130000 {
 377                 compatible = "ralink,mt7620-sdhci";
 378                 reg = <0x10130000 0x4000>;
 379
 380                 interrupt-parent = <&intc>;
 381                 interrupts = <14>;
 382
 383                 pinctrl-names = "default";
 384                 pinctrl-0 = <&sdxc_pins>;
 385
 386                 status = "disabled";
 387         };
 388
 389         ehci: ehci@101c0000 {
 390                 #address-cells = <1>;
 391                 #size-cells = <0>;
 392                 compatible = "generic-ehci";
 393                 reg = <0x101c0000 0x1000>;
 394
 395                 phys = <&usbphy>;
 396                 phy-names = "usb";
 397
 398                 interrupt-parent = <&intc>;
 399                 interrupts = <18>;
 400
 401                 ehci_port1: port@1 {
 402                         reg = <1>;
 403                         #trigger-source-cells = <0>;
 404                 };
 405         };
 406
 407         ohci: ohci@101c1000 {
 408                 #address-cells = <1>;
 409                 #size-cells = <0>;
 410                 compatible = "generic-ohci";
 411                 reg = <0x101c1000 0x1000>;
 412
 413                 phys = <&usbphy>;
 414                 phy-names = "usb";
 415
 416                 interrupt-parent = <&intc>;
 417                 interrupts = <18>;
 418
 419                 ohci_port1: port@1 {
 420                         reg = <1>;
 421                         #trigger-source-cells = <0>;
 422                 };
 423         };
 424
 425         ethernet: ethernet@10100000 {
 426                 compatible = "ralink,rt5350-eth";
 427                 reg = <0x10100000 0x10000>;
 428
 429                 interrupt-parent = <&cpuintc>;
 430                 interrupts = <5>;
 431
 432                 resets = <&rstctrl 21 &rstctrl 23>;
 433                 reset-names = "fe", "esw";
 434
 435                 mediatek,switch = <&esw>;
 436         };
 437
 438         esw: esw@10110000 {
 439                 compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
 440                 reg = <0x10110000 0x8000>;
 441
 442                 resets = <&rstctrl 23>;
 443                 reset-names = "esw";
 444
 445                 interrupt-parent = <&intc>;
 446                 interrupts = <17>;
 447         };
 448
 449         pcie: pcie@10140000 {
 450                 compatible = "mediatek,mt7620-pci";
 451                 reg = <0x10140000 0x100
 452                         0x10142000 0x100>;
 453
 454                 #address-cells = <3>;
 455                 #size-cells = <2>;
 456
 457                 interrupt-parent = <&cpuintc>;
 458                 interrupts = <4>;
 459
 460                 resets = <&rstctrl 26 &rstctrl 27>;
 461                 reset-names = "pcie0", "pcie1";
 462                 clocks = <&clkctrl 26 &clkctrl 27>;
 463                 clock-names = "pcie0", "pcie1";
 464
 465                 status = "disabled";
 466
 467                 device_type = "pci";
 468
 469                 bus-range = <0 255>;
 470                 ranges = <
 471                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 472                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 473                 >;
 474
 475                 pcie0: pcie@0,0 {
 476                         reg = <0x0000 0 0 0 0>;
 477
 478                         #address-cells = <3>;
 479                         #size-cells = <2>;
 480
 481                         device_type = "pci";
 482
 483                         ranges;
 484                 };
 485         };
 486
 487         wmac: wmac@10300000 {
 488                 compatible = "mediatek,mt7628-wmac";
 489                 reg = <0x10300000 0x100000>;
 490
 491                 interrupt-parent = <&cpuintc>;
 492                 interrupts = <6>;
 493
 494                 status = "disabled";
 495
 496                 mediatek,mtd-eeprom = <&factory 0x0000>;
 497         };
 498 };