base-files: correctly split install-key function for APK

[openwrt/openwrt.git] / target / linux / ath79 / dts / ar724x.dtsi

diff --git a/target/linux/ath79/dts/ar724x.dtsi b/target/linux/ath79/dts/ar724x.dtsi
index 2d7383c36defb299fee60c7278c50748f03a8a5c..c758fc244e72b9af0919c195093c7fd89fcad670 100644 (file)
--- a/target/linux/ath79/dts/ar724x.dtsi
+++ b/target/linux/ath79/dts/ar724x.dtsi
@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include <dt-bindings/clock/ath79-clk.h>
+
 #include "ath79.dtsi"
 
 / {
@@ -24,6 +24,13 @@
                };
        };
 
+       extosc: ref {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-output-names = "ref";
+               clock-frequency = <40000000>;
+       };
+
        ahb: ahb {
                apb {
                        ddr_ctrl: memory-controller@18000000 {
@@ -45,14 +52,12 @@
                                reg-io-width = <4>;
                                reg-shift = <2>;
                                no-loopback-test;
-
-                               status = "disabled";
                        };
 
                        gpio: gpio@18040000 {
                                compatible = "qca,ar7240-gpio",
                                                "qca,ar7100-gpio";
-                               reg = <0x18040000 0x30>;
+                               reg = <0x18040000 0x28>;
                                interrupts = <2>;
 
                                ngpios = <18>;
@@ -91,8 +96,8 @@
                                compatible = "qca,ar7240-pll", "syscon";
                                reg = <0x18050000 0x3c>;
 
+                               clocks = <&extosc>;
                                clock-names = "ref";
-                               /* The board must provides the ref clock */
 
                                #clock-cells = <1>;
                                clock-output-names = "cpu", "ddr", "ahb";
@@ -116,7 +121,7 @@
                                #reset-cells = <1>;
                        };
 
-                       pcie: pcie-controller@180c0000 {
+                       pcie: pcie@180c0000 {
                                compatible = "qcom,ar7240-pci";
                                #address-cells = <3>;
                                #size-cells = <2>;
@@ -133,6 +138,8 @@
                                resets = <&rst 6>, <&rst 7>;
                                reset-names = "hc", "phy";
 
+                               device_type = "pci";
+
                                interrupt-controller;
                                #interrupt-cells = <1>;