};
&rst {
- intc2: interrupt-controller@2 {
+ intc2: interrupt-controller {
compatible = "qca,ar9340-intc";
interrupt-parent = <&cpuintc>;
};
};
-&apb {
- pcie: pcie-controller@180c0000 {
+&ahb {
+ pcie: pcie@180c0000 {
compatible = "qcom,ar9340-pci", "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;
interrupt-parent = <&intc2>;
interrupts = <1>;
+ device_type = "pci";
+
+ resets = <&rst 6>, <&rst 7>;
+ reset-names = "hc", "phy";
+
interrupt-controller;
#interrupt-cells = <1>;