if (!e.valid) /* Check for invalid entry */
continue;
- pr_info("-> port %02d: mac %pM, vid: %d, rvid: %d, MC: %d, %d\n",
+ pr_debug("-> port %02d: mac %pM, vid: %d, rvid: %d, MC: %d, %d\n",
e.port, &e.mac[0], e.vid, e.rvid, e.is_ip_mc, e.is_ipv6_mc);
}
sw_w32_mask(0x3, 0x3, RTL838X_SDS4_REG28 + offset);
sw_w32_mask(0, 0x1 << 6, RTL838X_SDS4_DUMMY0 + offset);
sw_w32_mask(0x1 << 6, 0, RTL838X_SDS4_DUMMY0 + offset);
- pr_info("SERDES reset: %d\n", mac);
+ pr_debug("SERDES reset: %d\n", mac);
}
static int __init rtl8380_sds_power(int mac, int val)
int ret;
u32 pn;
- pr_info("In %s\n", __func__);
+ pr_debug("In %s\n", __func__);
mii_np = of_find_compatible_node(NULL, NULL, "realtek,rtl838x-mdio");
if (mii_np) {
- pr_info("Found compatible MDIO node!\n");
+ pr_debug("Found compatible MDIO node!\n");
} else {
dev_err(priv->dev, "no %s child node found", "mdio-bus");
return -ENODEV;
priv->mii_bus = of_mdio_find_bus(mii_np);
if (!priv->mii_bus) {
- pr_info("Deferring probe of mdio bus\n");
+ pr_debug("Deferring probe of mdio bus\n");
return -EPROBE_DEFER;
}
if (!of_device_is_available(mii_np))
// Check for the integrated SerDes of the RTL8380M first
if (of_property_read_bool(dn, "phy-is-integrated")
&& priv->id == 0x8380 && pn >= 24) {
- pr_info("----> FÓUND A SERDES\n");
+ pr_debug("----> FÓUND A SERDES\n");
priv->ports[pn].phy = PHY_RTL838X_SDS;
continue;
}
/* Power on fibre ports and reset them if necessary */
if (priv->ports[24].phy == PHY_RTL838X_SDS) {
- pr_info("Powering on fibre ports & reset\n");
+ pr_debug("Powering on fibre ports & reset\n");
rtl8380_sds_power(24, 1);
rtl8380_sds_power(26, 1);
}
- pr_info("%s done\n", __func__);
+ pr_debug("%s done\n", __func__);
return 0;
}
else
t = (t * 3) / 5;
- pr_info("L2 AGING time: %d sec\n", t);
- pr_info("Dynamic aging for ports: %x\n", sw_r32(priv->r->l2_port_aging_out));
+ pr_debug("L2 AGING time: %d sec\n", t);
+ pr_debug("Dynamic aging for ports: %x\n", sw_r32(priv->r->l2_port_aging_out));
return t;
}
struct device *dev = &pdev->dev;
u64 irq_mask;
- pr_info("Probing RTL838X switch device\n");
+ pr_debug("Probing RTL838X switch device\n");
if (!pdev->dev.of_node) {
dev_err(dev, "No DT found\n");
return -EINVAL;
priv->fib_entries = 16384;
rtl8390_get_version(priv);
}
- pr_info("Chip version %c\n", priv->version);
+ pr_debug("Chip version %c\n", priv->version);
err = rtl83xx_mdio_probe(priv);
if (err) {
static int rtl83xx_sw_remove(struct platform_device *pdev)
{
// TODO:
- pr_info("Removing platform driver for rtl83xx-sw\n");
+ pr_debug("Removing platform driver for rtl83xx-sw\n");
return 0;
}
if (soc_info.family == RTL8380_FAMILY_ID) {
ptr8 = RTL838X_SW_BASE + RTL838X_PORT_ISO_CTRL(0);
for (i = 0; i < 28; i += 8)
- pr_info("> %8x %8x %8x %8x %8x %8x %8x %8x\n",
+ pr_debug("> %8x %8x %8x %8x %8x %8x %8x %8x\n",
ptr8[i + 0], ptr8[i + 1], ptr8[i + 2], ptr8[i + 3],
ptr8[i + 4], ptr8[i + 5], ptr8[i + 6], ptr8[i + 7]);
- pr_info("CPU_PORT> %8x\n", ptr8[28]);
+ pr_debug("CPU_PORT> %8x\n", ptr8[28]);
} else {
ptr9 = RTL838X_SW_BASE + RTL839X_PORT_ISO_CTRL(0);
for (i = 0; i < 52; i += 4)
- pr_info("> %16llx %16llx %16llx %16llx\n",
+ pr_debug("> %16llx %16llx %16llx %16llx\n",
ptr9[i + 0], ptr9[i + 1], ptr9[i + 2], ptr9[i + 3]);
- pr_info("CPU_PORT> %16llx\n", ptr9[52]);
+ pr_debug("CPU_PORT> %16llx\n", ptr9[52]);
}
}
v |= BIT(i);
}
- pr_info("%s: %16llx\n", __func__, v);
+ pr_debug("%s: %16llx\n", __func__, v);
priv->r->set_port_reg_le(v, priv->r->smi_poll_ctrl);
/* PHY update complete */
struct rtl838x_switch_priv *priv = ds->priv;
u64 port_bitmap = BIT_ULL(priv->cpu_port);
- pr_info("%s called\n", __func__);
+ pr_debug("%s called\n", __func__);
/* Disable MAC polling the PHY so that we can start configuration */
priv->r->set_port_reg_le(0ULL, priv->r->smi_poll_ctrl);
/* Enable MAC Polling PHY again */
rtl83xx_enable_phy_polling(priv);
- pr_info("Please wait until PHY is settled\n");
+ pr_debug("Please wait until PHY is settled\n");
msleep(1000);
return 0;
}
struct rtl838x_switch_priv *priv = ds->priv;
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
- pr_info("In %s port %d", __func__, port);
+ pr_debug("In %s port %d", __func__, port);
if (!phy_interface_mode_is_rgmii(state->interface) &&
state->interface != PHY_INTERFACE_MODE_1000BASEX &&
u32 reg;
int speed_bit = priv->family_id == RTL8380_FAMILY_ID ? 4 : 3;
- pr_info("%s port %d, mode %x\n", __func__, port, mode);
+ pr_debug("%s port %d, mode %x\n", __func__, port, mode);
if (port == priv->cpu_port) {
/* Set Speed, duplex, flow control
/* Auto-Negotiation does not work for MAC in RTL8390 */
if (priv->family_id == RTL8380_FAMILY_ID) {
if (mode == MLO_AN_PHY) {
- pr_info("PHY autonegotiates\n");
+ pr_debug("PHY autonegotiates\n");
reg |= BIT(2);
sw_w32(reg, priv->r->mac_force_mode_ctrl(port));
return;
}
if (mode != MLO_AN_FIXED)
- pr_info("Fixed state.\n");
+ pr_debug("Fixed state.\n");
if (priv->family_id == RTL8380_FAMILY_ID) {
/* Clear id_mode_dis bit, and the existing port mode, let
{
struct rtl838x_switch_priv *priv = ds->priv;
- pr_info("%s: %x %d", __func__, (u32) priv, port);
+ pr_debug("%s: %x %d", __func__, (u32) priv, port);
priv->ports[port].enable = true;
if (dsa_is_cpu_port(ds, port))
{
struct rtl838x_switch_priv *priv = ds->priv;
- pr_info("%s %x: %d", __func__, (u32)priv, port);
+ pr_debug("%s %x: %d", __func__, (u32)priv, port);
/* you can only disable user ports */
if (!dsa_is_user_port(ds, port))
return;
{
struct rtl838x_switch_priv *priv = ds->priv;
- pr_info("%s: port %d", __func__, port);
+ pr_debug("%s: port %d", __func__, port);
e->supported = SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full;
if (sw_r32(priv->r->mac_force_mode_ctrl(port)) & BIT(9))
e->advertised |= ADVERTISED_100baseT_Full;
e->advertised |= ADVERTISED_1000baseT_Full;
e->eee_enabled = priv->ports[port].eee_enabled;
- pr_info("enabled: %d, active %x\n", e->eee_enabled, e->advertised);
+ pr_debug("enabled: %d, active %x\n", e->eee_enabled, e->advertised);
if (sw_r32(RTL838X_MAC_EEE_ABLTY) & BIT(port)) {
e->lp_advertised = ADVERTISED_100baseT_Full;
}
e->eee_active = !!(e->advertised & e->lp_advertised);
- pr_info("active: %d, lp %x\n", e->eee_active, e->lp_advertised);
+ pr_debug("active: %d, lp %x\n", e->eee_active, e->lp_advertised);
return 0;
}
{
struct rtl838x_switch_priv *priv = ds->priv;
- pr_info("%s: port %d", __func__, port);
+ pr_debug("%s: port %d", __func__, port);
if (e->eee_enabled) {
- pr_info("Globally enabling EEE\n");
+ pr_debug("Globally enabling EEE\n");
sw_w32_mask(0x4, 0, RTL838X_SMI_GLB_CTRL);
}
if (e->eee_enabled) {
- pr_info("Enabling EEE for MAC %d\n", port);
+ pr_debug("Enabling EEE for MAC %d\n", port);
sw_w32_mask(0, 3 << 9, priv->r->mac_force_mode_ctrl(port));
sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_TX_EN);
sw_w32_mask(0, BIT(port), RTL838X_EEE_PORT_RX_EN);
priv->ports[port].eee_enabled = true;
e->eee_enabled = true;
} else {
- pr_info("Disabling EEE for MAC %d\n", port);
+ pr_debug("Disabling EEE for MAC %d\n", port);
sw_w32_mask(3 << 9, 0, priv->r->mac_force_mode_ctrl(port));
sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_TX_EN);
sw_w32_mask(BIT(port), 0, RTL838X_EEE_PORT_RX_EN);
u64 port_bitmap = BIT_ULL(priv->cpu_port);
int i;
- pr_info("%s %x: %d %llx", __func__, (u32)priv, port, port_bitmap);
+ pr_debug("%s %x: %d %llx", __func__, (u32)priv, port, port_bitmap);
mutex_lock(&priv->reg_mutex);
for (i = 0; i < ds->num_ports; i++) {
/* Add this port to the port matrix of the other ports in the
u64 port_bitmap = BIT_ULL(priv->cpu_port);
int i;
- pr_info("%s %x: %d", __func__, (u32)priv, port);
+ pr_debug("%s %x: %d", __func__, (u32)priv, port);
mutex_lock(&priv->reg_mutex);
for (i = 0; i < ds->num_ports; i++) {
/* Remove this port from the port matrix of the other ports
struct rtl838x_switch_priv *priv = ds->priv;
int n = priv->family_id == RTL8380_FAMILY_ID ? 2 : 4;
- pr_info("%s: port %d state %2x\n", __func__, port, state);
+ pr_debug("%s: port %d state %2x\n", __func__, port, state);
/* CPU PORT can only be configured on RTL838x */
if (port >= priv->cpu_port || port > 51)
struct rtl838x_switch_priv *priv = ds->priv;
int s = priv->family_id == RTL8390_FAMILY_ID ? 2 : 0;
- pr_info("FAST AGE port %d\n", port);
+ pr_debug("FAST AGE port %d\n", port);
mutex_lock(&priv->reg_mutex);
/* RTL838X_L2_TBL_FLUSH_CTRL register bits, 839x has 1 bit larger
* port fields:
{
struct rtl838x_switch_priv *priv = ds->priv;
- pr_info("%s: port %d\n", __func__, port);
+ pr_debug("%s: port %d\n", __func__, port);
mutex_lock(&priv->reg_mutex);
if (vlan_filtering) {
struct rtl838x_vlan_info info;
struct rtl838x_switch_priv *priv = ds->priv;
- pr_info("%s: port %d\n", __func__, port);
+ pr_debug("%s: port %d\n", __func__, port);
mutex_lock(&priv->reg_mutex);
priv->r->vlan_tables_read(0, &info);
- pr_info("Tagged ports %llx, untag %llx, prof %x, MC# %d, UC# %d, FID %x\n",
+ pr_debug("Tagged ports %llx, untag %llx, prof %x, MC# %d, UC# %d, FID %x\n",
info.tagged_ports, info.untagged_ports, info.profile_id,
info.hash_mc, info.hash_uc, info.fid);
int v;
u64 portmask;
- pr_info("%s port %d, vid_end %d, vid_end %d, flags %x\n", __func__,
+ pr_debug("%s port %d, vid_end %d, vid_end %d, flags %x\n", __func__,
port, vlan->vid_begin, vlan->vid_end, vlan->flags);
if (vlan->vid_begin > 4095 || vlan->vid_end > 4095) {
int v;
u64 portmask;
- pr_info("%s: port %d, vid_end %d, vid_end %d, flags %x\n", __func__,
+ pr_debug("%s: port %d, vid_end %d, vid_end %d, flags %x\n", __func__,
port, vlan->vid_begin, vlan->vid_end, vlan->flags);
if (vlan->vid_begin > 4095 || vlan->vid_end > 4095) {
/* Get untagged port memberships of this vlan */
priv->r->vlan_tables_read(v, &info);
portmask = info.untagged_ports & (~(1ULL << port));
- pr_info("Untagged ports, VLAN %d: %llx\n", v, portmask);
+ pr_debug("Untagged ports, VLAN %d: %llx\n", v, portmask);
priv->r->vlan_set_untagged(v, portmask);
}
/* Get tagged port memberships of this vlan */
priv->r->vlan_tables_read(v, &info);
info.tagged_ports &= (~(1ULL << port));
- pr_info("Tagged ports, VLAN %d: %llx\n", v, info.tagged_ports);
+ pr_debug("Tagged ports, VLAN %d: %llx\n", v, info.tagged_ports);
priv->r->vlan_set_tagged(v, &info);
}
mutex_unlock(&priv->reg_mutex);
u64 entry;
int idx = -1, err = 0, i;
- pr_info("In %s, mac %llx, vid: %d, key: %x\n", __func__, mac, vid, key);
+ pr_debug("In %s, mac %llx, vid: %d, key: %x\n", __func__, mac, vid, key);
mutex_lock(&priv->reg_mutex);
for (i = 0; i < 4; i++) {
entry = priv->r->read_l2_entry_using_hash(key, i, &e);
mac = ether_addr_to_u64(&e.mac[0]);
pkey = rtl838x_hash(priv, mac << 12 | fid);
fid = (pkey & 0x3ff) | (fid & ~0x3ff);
- pr_info("-> mac %016llx, fid: %d\n", mac, fid);
+ pr_debug("-> mac %016llx, fid: %d\n", mac, fid);
cb(e.mac, e.vid, e.is_static, data);
}
}
int group;
struct rtl838x_switch_priv *priv = ds->priv;
- pr_info("In %s\n", __func__);
+ pr_debug("In %s\n", __func__);
for (group = 0; group < 4; group++) {
if (priv->mirror_group_ports[group] == mirror->to_local_port)
int group = 0;
struct rtl838x_switch_priv *priv = ds->priv;
- pr_info("In %s\n", __func__);
+ pr_debug("In %s\n", __func__);
for (group = 0; group < 4; group++) {
if (priv->mirror_group_ports[group] == mirror->to_local_port)
break;
}
h = (struct fw_header *) fw->data;
- pr_info("Firmware loaded. Size %d, magic: %08x\n", fw->size, h->magic);
+ pr_debug("Firmware loaded. Size %d, magic: %08x\n", fw->size, h->magic);
if (h->magic != 0x83808380) {
pr_err("Wrong firmware file: MAGIC mismatch.\n");
phy_id = val << 16;
read_phy(mac, 0, 3, &val);
phy_id |= val;
- pr_info("Phy on MAC %d: %x\n", mac, phy_id);
+ pr_debug("Phy on MAC %d: %x\n", mac, phy_id);
/* Read internal PHY ID */
write_phy(mac, 31, 27, 0x0002);
static int reg[] = {16, 19, 20, 21};
int val, media, power;
- pr_info("%s: port %d, set_fibre: %d\n", __func__, mac, set_fibre);
+ pr_debug("%s: port %d, set_fibre: %d\n", __func__, mac, set_fibre);
write_phy(base, 0xfff, 29, 8);
read_phy(base, 0x266, reg[mac % 4], &val);
media = (val >> 10) & 0x3;
- pr_info("Current media %x\n", media);
+ pr_debug("Current media %x\n", media);
if (media & 0x2) {
- pr_info("Powering off COPPER\n");
+ pr_debug("Powering off COPPER\n");
write_phy(base, 0xfff, 29, 1);
/* Ensure power is off */
read_phy(base, 0xa40, 16, &power);
if (!(power & BIT(11)))
write_phy(base, 0xa40, 16, power | BIT(11));
} else {
- pr_info("Powering off FIBRE");
+ pr_debug("Powering off FIBRE");
write_phy(base, 0xfff, 29, 3);
/* Ensure power is off */
read_phy(base, 0xa40, 16, &power);
write_phy(base, 0xfff, 29, 0);
if (set_fibre) {
- pr_info("Powering on FIBRE");
+ pr_debug("Powering on FIBRE");
write_phy(base, 0xfff, 29, 3);
/* Ensure power is off */
read_phy(base, 0xa40, 16, &power);
if (power & BIT(11))
write_phy(base, 0xa40, 16, power & ~BIT(11));
} else {
- pr_info("Powering on COPPER\n");
+ pr_debug("Powering on COPPER\n");
write_phy(base, 0xfff, 29, 1);
/* Ensure power is off */
read_phy(base, 0xa40, 16, &power);
/* Back up serdes power off value */
sds_conf_value = sw_r32(RTL838X_SDS_CFG_REG);
- pr_info("SDS power down value: %x\n", sds_conf_value);
+ pr_debug("SDS power down value: %x\n", sds_conf_value);
/* take serdes into reset */
i = 0;
v |= 0x4 << 5 | 0x4;
sw_w32(v, RTL838X_SDS_MODE_SEL);
- pr_info("PLL control register: %x\n", sw_r32(RTL838X_PLL_CML_CTRL));
+ pr_debug("PLL control register: %x\n", sw_r32(RTL838X_PLL_CML_CTRL));
sw_w32_mask(0xfffffff0, 0xaaaaaaaf & 0xf, RTL838X_PLL_CML_CTRL);
i = 0;
while (rtl8380_sds01_qsgmii_6275b[2 * i]) {
i++;
}
- pr_info("SDS power down value now: %x\n", sw_r32(RTL838X_SDS_CFG_REG));
+ pr_debug("SDS power down value now: %x\n", sw_r32(RTL838X_SDS_CFG_REG));
sw_w32(sds_conf_value, RTL838X_SDS_CFG_REG);
- pr_info("Configuration of SERDES done\n");
+ pr_debug("Configuration of SERDES done\n");
return 0;
}
struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
- pr_info("%s: id: %d\n", __func__, addr);
+ pr_debug("%s: id: %d\n", __func__, addr);
if (soc_info.family != RTL8390_FAMILY_ID)
return -ENODEV;