target/linux/ath79/dts/ar9132.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2
   3 #include "ath79.dtsi"
   4
   5 / {
   6         compatible = "qca,ar9132";
   7
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         chosen {
  12                 bootargs = "console=ttyS0,115200";
  13         };
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         device_type = "cpu";
  21                         compatible = "mips,mips24Kc";
  22                         clocks = <&pll ATH79_CLK_CPU>;
  23                         reg = <0>;
  24                 };
  25         };
  26
  27         extosc: ref {
  28                 compatible = "fixed-clock";
  29                 #clock-cells = <0>;
  30                 clock-output-names = "ref";
  31                 clock-frequency = <40000000>;
  32         };
  33
  34         cpuintc: interrupt-controller {
  35                 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
  36
  37                 interrupt-controller;
  38                 #interrupt-cells = <1>;
  39
  40                 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
  41                 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
  42                                         <&ddr_ctrl 0>, <&ddr_ctrl 1>;
  43         };
  44
  45         ahb {
  46                 compatible = "simple-bus";
  47                 ranges;
  48
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51
  52                 interrupt-parent = <&cpuintc>;
  53
  54                 apb {
  55                         compatible = "simple-bus";
  56                         ranges;
  57
  58                         #address-cells = <1>;
  59                         #size-cells = <1>;
  60
  61                         interrupt-parent = <&miscintc>;
  62
  63                         ddr_ctrl: memory-controller@18000000 {
  64                                 compatible = "qca,ar9132-ddr-controller",
  65                                                 "qca,ar7240-ddr-controller";
  66                                 reg = <0x18000000 0x100>;
  67
  68                                 #qca,ddr-wb-channel-cells = <1>;
  69                         };
  70
  71                         uart: uart@18020000 {
  72                                 compatible = "ns8250";
  73                                 reg = <0x18020000 0x20>;
  74                                 interrupts = <3>;
  75
  76                                 clocks = <&pll ATH79_CLK_AHB>;
  77                                 clock-names = "uart";
  78
  79                                 reg-io-width = <4>;
  80                                 reg-shift = <2>;
  81                                 no-loopback-test;
  82                         };
  83
  84                         gpio: gpio@18040000 {
  85                                 compatible = "qca,ar9132-gpio",
  86                                                 "qca,ar7100-gpio";
  87                                 reg = <0x18040000 0x28>;
  88                                 interrupts = <2>;
  89
  90                                 ngpios = <22>;
  91
  92                                 gpio-controller;
  93                                 #gpio-cells = <2>;
  94
  95                                 interrupt-controller;
  96                                 #interrupt-cells = <2>;
  97                         };
  98
  99                         pll: pll-controller@18050000 {
 100                                 compatible = "qca,ar9132-pll",
 101                                                 "qca,ar9130-pll", "syscon";
 102                                 reg = <0x18050000 0x20>;
 103
 104                                 clocks = <&extosc>;
 105                                 clock-names = "ref";
 106
 107                                 #clock-cells = <1>;
 108                                 clock-output-names = "cpu", "ddr", "ahb";
 109                         };
 110
 111                         wdt: wdt@18060008 {
 112                                 compatible = "qca,ar7130-wdt";
 113                                 reg = <0x18060008 0x8>;
 114
 115                                 interrupts = <4>;
 116
 117                                 clocks = <&pll ATH79_CLK_AHB>;
 118                                 clock-names = "wdt";
 119                         };
 120
 121                         miscintc: interrupt-controller@18060010 {
 122                                 compatible = "qca,ar9132-misc-intc",
 123                                            "qca,ar7100-misc-intc";
 124                                 reg = <0x18060010 0x8>;
 125
 126                                 interrupt-parent = <&cpuintc>;
 127                                 interrupts = <6>;
 128
 129                                 interrupt-controller;
 130                                 #interrupt-cells = <1>;
 131                         };
 132
 133                         rst: reset-controller@1806001c {
 134                                 compatible = "qca,ar9132-reset",
 135                                                 "qca,ar7100-reset";
 136                                 reg = <0x1806001c 0x4>;
 137
 138                                 #reset-cells = <1>;
 139                         };
 140                 };
 141
 142                 usb: usb@1b000100 {
 143                         compatible = "qca,ar7100-ehci", "generic-ehci";
 144                         reg = <0x1b000100 0x100>;
 145
 146                         interrupts = <3>;
 147                         resets = <&rst 5>;
 148
 149                         has-transaction-translator;
 150
 151                         phy-names = "usb";
 152                         phys = <&usb_phy>;
 153
 154                         status = "disabled";
 155
 156                         #address-cells = <1>;
 157                         #size-cells = <0>;
 158
 159                         hub_port: port@1 {
 160                                 reg = <1>;
 161                                 #trigger-source-cells = <0>;
 162                         };
 163                 };
 164
 165                 spi: spi@1f000000 {
 166                         compatible = "qca,ar9132-spi", "qca,ar7100-spi";
 167                         reg = <0x1f000000 0x10>;
 168
 169                         clocks = <&pll ATH79_CLK_AHB>;
 170                         clock-names = "ahb";
 171
 172                         status = "disabled";
 173
 174                         #address-cells = <1>;
 175                         #size-cells = <0>;
 176                 };
 177
 178                 wmac: wmac@180c0000 {
 179                         compatible = "qca,ar9130-wmac";
 180                         reg = <0x180c0000 0x230000>;
 181
 182                         interrupts = <2>;
 183
 184                         status = "disabled";
 185                 };
 186         };
 187
 188         usb_phy: usb-phy {
 189                 compatible = "qca,ar7200-usb-phy";
 190
 191                 reset-names = "usb-phy", "usb-suspend-override";
 192                 resets = <&rst 4>, <&rst 3>;
 193
 194                 #phy-cells = <0>;
 195
 196                 status = "disabled";
 197         };
 198 };
 199
 200 &eth0 {
 201         compatible = "qca,ar9130-eth", "syscon";
 202         reg = <0x19000000 0x200
 203                 0x18070000 0x4>;
 204         pll-data = <0x1a000000 0x13000a44 0x00441099>;
 205         pll-reg = <0x4 0x14 20>;
 206         pll-handle = <&pll>;
 207         resets = <&rst 9>;
 208         reset-names = "mac";
 209         qca,mac-idx = <0>;
 210 };