target/linux/ath79/dts/ar9344_araknis_an-300-ap-i-n.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar9344.dtsi"
   4 #include "ar934x_senao_loader.dtsi"
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/leds/common.h>
   9
  10 / {
  11         compatible = "araknis,an-300-ap-i-n", "qca,ar9344";
  12         model = "Araknis AN-300-AP-I-N";
  13
  14         aliases {
  15                 label-mac-device = &eth0;
  16                 led-boot = &led_power;
  17                 led-failsafe = &led_power;
  18                 led-upgrade = &led_power;
  19         };
  20
  21         keys {
  22                 compatible = "gpio-keys";
  23
  24                 reset {
  25                         linux,code = <KEY_RESTART>;
  26                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  27                         debounce-interval = <60>;
  28                 };
  29         };
  30
  31         leds {
  32                 compatible = "gpio-leds";
  33
  34                 led_power: power {
  35                         function = LED_FUNCTION_POWER;
  36                         color = <LED_COLOR_ID_AMBER>;
  37                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  38                         default-state = "off";
  39                 };
  40
  41                 wifi5g {
  42                         label = "blue:wifi5g";
  43                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  44                         linux,default-trigger = "phy0tpt";
  45                 };
  46
  47                 wps {
  48                         function = LED_FUNCTION_WPS;
  49                         color = <LED_COLOR_ID_BLUE>;
  50                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  51                 };
  52         };
  53
  54         ath9k-leds {
  55                 compatible = "gpio-leds";
  56
  57                 wifi2g {
  58                         label = "blue:wifi2g";
  59                         gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
  60                         linux,default-trigger = "phy1tpt";
  61                 };
  62         };
  63 };
  64
  65 &mdio0 {
  66         status = "okay";
  67
  68         phy0: ethernet-phy@0 {
  69                 reg = <0>;
  70                 eee-broken-100tx;
  71                 eee-broken-1000t;
  72         };
  73 };
  74
  75 &eth0 {
  76         status = "okay";
  77
  78         nvmem-cells = <&macaddr_art_0 0>;
  79         nvmem-cell-names = "mac-address";
  80
  81         phy-handle = <&phy0>;
  82         phy-mode = "rgmii-txid";
  83
  84         pll-data = <0x02000000 0x00000101 0x00001313>;
  85 };
  86
  87 &pcie {
  88         status = "okay";
  89
  90         ath9k: wifi@0,0 {
  91                 compatible = "pci168c,0030";
  92                 reg = <0x0 0 0 0 0>;
  93                 nvmem-cells = <&macaddr_art_0 1>, <&calibration_art_5000>;
  94                 nvmem-cell-names = "mac-address", "calibration";
  95                 ieee80211-freq-limit = <2402000 2482000>;
  96                 #gpio-cells = <2>;
  97                 gpio-controller;
  98         };
  99 };
 100
 101 &wmac {
 102         status = "okay";
 103
 104         ieee80211-freq-limit = <4900000 5990000>;
 105
 106         nvmem-cells = <&macaddr_art_0 2>, <&calibration_art_1000>;
 107         nvmem-cell-names = "mac-address", "calibration";
 108 };
 109
 110 &art {
 111         nvmem-layout {
 112                 compatible = "fixed-layout";
 113                 #address-cells = <1>;
 114                 #size-cells = <1>;
 115
 116                 macaddr_art_0: macaddr@0 {
 117                         compatible = "mac-base";
 118                         reg = <0x0 0x6>;
 119                         #nvmem-cell-cells = <1>;
 120                 };
 121
 122                 calibration_art_1000: calibration@1000 {
 123                         reg = <0x1000 0x440>;
 124                 };
 125
 126                 calibration_art_5000: calibration@5000 {
 127                         reg = <0x5000 0x440>;
 128                 };
 129         };
 130 };