target/linux/ath79/dts/ar9344_pcs_cap324.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar9344.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         model = "PowerCloud Systems CAP324";
  11         compatible = "pcs,cap324", "qca,ar9344";
  12
  13         aliases {
  14                 led-boot = &led_power_amber;
  15                 led-failsafe = &led_power_amber;
  16                 led-running = &led_power_green;
  17                 led-upgrade = &led_power_amber;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 pinctrl-names = "default";
  24                 pinctrl-0 = <&jtag_disable_pins>;
  25
  26                 reset {
  27                         label = "Reset button";
  28                         linux,code = <KEY_RESTART>;
  29                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  30                         debounce-interval = <60>;
  31                 };
  32         };
  33
  34         leds {
  35                 compatible = "gpio-leds";
  36
  37                 led_power_amber: power_amber {
  38                         function = LED_FUNCTION_POWER;
  39                         color = <LED_COLOR_ID_AMBER>;
  40                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  41                 };
  42
  43                 led_power_green: power_green {
  44                         function = LED_FUNCTION_POWER;
  45                         color = <LED_COLOR_ID_GREEN>;
  46                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  47                         default-state = "on";
  48                 };
  49
  50                 wlan_amber {
  51                         function = LED_FUNCTION_WLAN;
  52                         color = <LED_COLOR_ID_AMBER>;
  53                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  54                         linux,default-trigger = "phy1tpt";
  55                 };
  56
  57                 wlan_green {
  58                         function = LED_FUNCTION_WLAN;
  59                         color = <LED_COLOR_ID_GREEN>;
  60                         gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
  61                         linux,default-trigger = "phy0tpt";
  62                 };
  63
  64                 lan_amber {
  65                         function = LED_FUNCTION_LAN;
  66                         color = <LED_COLOR_ID_AMBER>;
  67                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  68                 };
  69
  70                 lan_green {
  71                         function = LED_FUNCTION_LAN;
  72                         color = <LED_COLOR_ID_GREEN>;
  73                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  74                 };
  75         };
  76 };
  77
  78 &ref {
  79         clock-frequency = <25000000>;
  80 };
  81
  82 &spi {
  83         status = "okay";
  84
  85         flash@0 {
  86                 compatible = "jedec,spi-nor";
  87                 reg = <0>;
  88                 spi-max-frequency = <25000000>;
  89
  90                 partitions {
  91                         compatible = "fixed-partitions";
  92                         #address-cells = <1>;
  93                         #size-cells = <1>;
  94
  95                         uboot: partition@0 {
  96                                 label = "u-boot";
  97                                 reg = <0x000000 0x040000>;
  98                                 read-only;
  99                         };
 100
 101                         partition@40000 {
 102                                 label = "u-boot-env";
 103                                 reg = <0x040000 0x010000>;
 104                                 read-only;
 105                         };
 106
 107                         partition@50000 {
 108                                 compatible = "denx,uimage";
 109                                 label = "firmware";
 110                                 reg = <0x050000 0x0fa0000>;
 111                         };
 112
 113                         art: partition@7f0000 {
 114                                 label = "art";
 115                                 reg = <0xff0000 0x010000>;
 116                                 read-only;
 117
 118                                 nvmem-layout {
 119                                         compatible = "fixed-layout";
 120                                         #address-cells = <1>;
 121                                         #size-cells = <1>;
 122
 123                                         macaddr_art_0: macaddr@0 {
 124                                                 compatible = "mac-base";
 125                                                 reg = <0x0 0x6>;
 126                                                 #nvmem-cell-cells = <1>;
 127                                         };
 128                                 };
 129                         };
 130                 };
 131         };
 132 };
 133
 134 &pcie {
 135         status = "okay";
 136
 137         ath9k: wifi@0,0 {
 138                 compatible = "168c,0030";
 139                 reg = <0x0000 0 0 0 0>;
 140                 nvmem-cells = <&macaddr_art_0 (-2)>;
 141                 nvmem-cell-names = "mac-address";
 142                 mtd-cal-data = <&art 0x5000>;
 143                 qca,no-eeprom;
 144                 ieee80211-freq-limit = <2402000 2482000>;
 145                 #gpio-cells = <2>;
 146                 gpio-controller;
 147         };
 148 };
 149
 150 &wmac {
 151         status = "okay";
 152
 153         ieee80211-freq-limit = <4900000 5990000>;
 154         mtd-cal-data = <&art 0x1000>;
 155         nvmem-cells = <&macaddr_art_0 (-1)>;
 156         nvmem-cell-names = "mac-address";
 157 };
 158
 159 &mdio0 {
 160         status = "okay";
 161
 162         phy0: ethernet-phy@0 {
 163                 reg = <0>;
 164                 phy-mode = "rgmii";
 165         };
 166 };
 167
 168 &eth0 {
 169         status = "okay";
 170
 171         /* default for ar934x, except for 1000M */
 172         pll-data = <0x06000000 0x00000101 0x00001616>;
 173
 174         nvmem-cells = <&macaddr_art_0 0>;
 175         nvmem-cell-names = "mac-address";
 176
 177         phy-mode = "rgmii";
 178         phy-handle = <&phy0>;
 179 };