target/linux/ath79/dts/ar9344_pcs_cr5000.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar9344.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         model = "PowerCloud Systems CR5000";
  11         compatible = "pcs,cr5000", "qca,ar9344";
  12
  13         aliases {
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 pinctrl-names = "default";
  24                 pinctrl-0 = <&jtag_disable_pins>;
  25
  26                 reset {
  27                         label = "Reset button";
  28                         linux,code = <KEY_RESTART>;
  29                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  30                         debounce-interval = <60>;
  31                 };
  32
  33                 wps {
  34                         label = "WPS button";
  35                         linux,code = <KEY_WPS_BUTTON>;
  36                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  37                         debounce-interval = <60>;
  38                 };
  39         };
  40
  41         leds {
  42                 compatible = "gpio-leds";
  43
  44                 led_power: power {
  45                         function = LED_FUNCTION_POWER;
  46                         color = <LED_COLOR_ID_AMBER>;
  47                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>,
  48                                 <&gpio 4 GPIO_ACTIVE_LOW>;
  49                         default-state = "on";
  50                 };
  51
  52                 wlan2g {
  53                         function = LED_FUNCTION_WLAN;
  54                         color = <LED_COLOR_ID_BLUE>;
  55                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  56                         linux,default-trigger = "phy0tpt";
  57                 };
  58
  59                 wps_white {
  60                         function = LED_FUNCTION_WPS;
  61                         color = <LED_COLOR_ID_WHITE>;
  62                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  63                 };
  64         };
  65 };
  66
  67 &ref {
  68         clock-frequency = <25000000>;
  69 };
  70
  71 &spi {
  72         status = "okay";
  73
  74         flash@0 {
  75                 compatible = "jedec,spi-nor";
  76                 reg = <0>;
  77                 spi-max-frequency = <25000000>;
  78
  79                 partitions {
  80                         compatible = "fixed-partitions";
  81                         #address-cells = <1>;
  82                         #size-cells = <1>;
  83
  84                         uboot: partition@0 {
  85                                 label = "u-boot";
  86                                 reg = <0x000000 0x040000>;
  87                                 read-only;
  88                         };
  89
  90                         partition@40000 {
  91                                 label = "u-boot-env";
  92                                 reg = <0x040000 0x010000>;
  93                                 read-only;
  94                         };
  95
  96                         partition@50000 {
  97                                 compatible = "denx,uimage";
  98                                 label = "firmware";
  99                                 reg = <0x050000 0x07a0000>;
 100                         };
 101
 102                         art: partition@7f0000 {
 103                                 label = "art";
 104                                 reg = <0x7f0000 0x010000>;
 105                                 read-only;
 106
 107                                 nvmem-layout {
 108                                         compatible = "fixed-layout";
 109                                         #address-cells = <1>;
 110                                         #size-cells = <1>;
 111
 112                                         macaddr_art_0: macaddr@0 {
 113                                                 reg = <0x0 0x6>;
 114                                         };
 115
 116                                         macaddr_art_5002: macaddr@5002 {
 117                                                 reg = <0x5002 0x6>;
 118                                         };
 119                                 };
 120                         };
 121                 };
 122         };
 123 };
 124
 125 &usb {
 126         status = "okay";
 127 };
 128
 129 &usb_phy {
 130         status = "okay";
 131 };
 132
 133 &pcie {
 134         status = "okay";
 135
 136         ath9k: wifi@0,0 {
 137                 compatible = "pci168c,0030";
 138                 reg = <0x0000 0 0 0 0>;
 139                 nvmem-cells = <&macaddr_art_5002>;
 140                 nvmem-cell-names = "mac-address";
 141                 #gpio-cells = <2>;
 142                 gpio-controller;
 143         };
 144 };
 145
 146 &mdio0 {
 147         status = "okay";
 148
 149         phy0: ethernet-phy@0 {
 150                 reg = <0>;
 151                 phy-mode = "rgmii";
 152                 qca,ar8327-initvals = <
 153                         0x04 0x07600000 /* PORT0 PAD MODE CTRL */
 154                         0x10 0x81000080 /* POWER_ON_STRAP */
 155                         0x50 0xcc35cc35 /* LED_CTRL0 */
 156                         0x54 0xca35ca35 /* LED_CTRL1 */
 157                         0x58 0xc935c935 /* LED_CTRL2 */
 158                         0x5c 0x03ffff00 /* LED_CTRL3 */
 159                         0x7c 0x0000007e /* PORT0_STATUS */
 160                 >;
 161         };
 162 };
 163
 164 &eth0 {
 165         #address-cells = <1>;
 166         #size-cells = <0>;
 167         status = "okay";
 168
 169         /* default for ar934x, except for 1000M */
 170         pll-data = <0x06000000 0x00000101 0x00001616>;
 171
 172         nvmem-cells = <&macaddr_art_0>;
 173         nvmem-cell-names = "mac-address";
 174
 175         phy-mode = "rgmii";
 176         phy-handle = <&phy0>;
 177
 178         aliases {
 179                 ag0 = &eth1;
 180         };
 181
 182         port@0 {
 183                 compatible = "swconfig,port";
 184                 reg = <0>;
 185                 swconfig,segment = "lan";
 186                 swconfig,portmap = <1 1>;
 187         };
 188
 189         port@1 {
 190                 compatible = "swconfig,port";
 191                 reg = <1>;
 192                 swconfig,segment = "lan";
 193                 swconfig,portmap = <2 2>;
 194         };
 195
 196         port@2 {
 197                 compatible = "swconfig,port";
 198                 reg = <2>;
 199                 swconfig,segment = "lan";
 200                 swconfig,portmap = <3 3>;
 201         };
 202
 203         port@3 {
 204                 compatible = "swconfig,port";
 205                 reg = <3>;
 206                 swconfig,segment = "lan";
 207                 swconfig,portmap = <4 4>;
 208         };
 209
 210         port@4 {
 211                 compatible = "swconfig,port";
 212                 reg = <4>;
 213                 swconfig,segment = "wan";
 214                 swconfig,portmap = <5 5>;
 215         };
 216 };
 217
 218 &wmac {
 219         status = "okay";
 220
 221         mtd-cal-data = <&art 0x1000>;
 222 };