target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar9344.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         aliases {
  10                 led-boot = &led_system;
  11                 led-failsafe = &led_system;
  12                 led-running = &led_system;
  13                 led-upgrade = &led_system;
  14         };
  15
  16         leds: leds {
  17                 compatible = "gpio-leds";
  18
  19                 wlan2g {
  20                         label = "green:wlan2g";
  21                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  22                         linux,default-trigger = "phy0tpt";
  23                 };
  24
  25                 led_system: system {
  26                         label = "green:system";
  27                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  28                         default-state = "on";
  29                 };
  30
  31                 qss {
  32                         label = "green:qss";
  33                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  34                 };
  35         };
  36
  37         ath9k-leds {
  38                 compatible = "gpio-leds";
  39
  40                 wlan5g {
  41                         label = "green:wlan5g";
  42                         gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
  43                         linux,default-trigger = "phy1tpt";
  44                 };
  45         };
  46
  47         keys {
  48                 compatible = "gpio-keys";
  49
  50                 reset {
  51                         linux,code = <KEY_RESTART>;
  52                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  53                         debounce-interval = <60>;
  54                 };
  55
  56                 wifi {
  57                         linux,code = <KEY_RFKILL>;
  58                         linux,input-type = <EV_SW>;
  59                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  60                         debounce-interval = <60>;
  61                 };
  62         };
  63 };
  64
  65 &ref {
  66         clock-frequency = <40000000>;
  67 };
  68
  69 &spi {
  70         status = "okay";
  71
  72         flash@0 {
  73                 compatible = "jedec,spi-nor";
  74                 reg = <0>;
  75                 spi-max-frequency = <33000000>;
  76
  77                 partitions {
  78                         compatible = "fixed-partitions";
  79                         #address-cells = <1>;
  80                         #size-cells = <1>;
  81
  82                         uboot: partition@0 {
  83                                 label = "u-boot";
  84                                 reg = <0x000000 0x020000>;
  85                                 read-only;
  86
  87                                 nvmem-layout {
  88                                         compatible = "fixed-layout";
  89                                         #address-cells = <1>;
  90                                         #size-cells = <1>;
  91
  92                                         macaddr_uboot_1fc00: macaddr@1fc00 {
  93                                                 compatible = "mac-base";
  94                                                 reg = <0x1fc00 0x6>;
  95                                                 #nvmem-cell-cells = <1>;
  96                                         };
  97                                 };
  98                         };
  99
 100                         partition@20000 {
 101                                 compatible = "tplink,firmware";
 102                                 label = "firmware";
 103                                 reg = <0x020000 0x7d0000>;
 104                         };
 105
 106                         art: partition@7f0000 {
 107                                 label = "art";
 108                                 reg = <0x7f0000 0x010000>;
 109                                 read-only;
 110
 111                                 nvmem-layout {
 112                                         compatible = "fixed-layout";
 113                                         #address-cells = <1>;
 114                                         #size-cells = <1>;
 115
 116                                         cal_art_1000: cal@1000 {
 117                                                 reg = <0x1000 0x440>;
 118                                         };
 119
 120                                         cal_art_5000: cal@5000 {
 121                                                 reg = <0x5000 0x440>;
 122                                         };
 123                                 };
 124                         };
 125                 };
 126         };
 127 };