ath79: update WA/XC devices UBNT_VERSION to 8.7.4
[openwrt/staging/wigyori.git] / target / linux / ath79 / dts / qca9533_comfast_cf-e110n-v2.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca953x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8
9 / {
10 compatible = "comfast,cf-e110n-v2", "qca,qca9533";
11 model = "COMFAST CF-E110N v2";
12
13 aliases {
14 serial0 = &uart;
15 led-boot = &led_rssihigh;
16 led-failsafe = &led_rssihigh;
17 led-upgrade = &led_rssihigh;
18 };
19
20 leds {
21 compatible = "gpio-leds";
22
23 pinctrl-names = "default";
24 pinctrl-0 = <&jtag_disable_pins &led_rssilow_pin &led_rssimediumhigh_pin &led_rssihigh_pin>;
25
26 wan {
27 function = LED_FUNCTION_WAN;
28 color = <LED_COLOR_ID_GREEN>;
29 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
30 };
31
32 lan {
33 function = LED_FUNCTION_LAN;
34 color = <LED_COLOR_ID_GREEN>;
35 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
36 };
37
38 rssilow {
39 label = "red:rssilow";
40 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
41 };
42
43 rssimediumlow {
44 label = "red:rssimediumlow";
45 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
46 };
47
48 rssimediumhigh {
49 label = "green:rssimediumhigh";
50 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
51 };
52
53 led_rssihigh: rssihigh {
54 label = "green:rssihigh";
55 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
56 };
57 };
58
59 ath9k-leds {
60 compatible = "gpio-leds";
61
62 wlan {
63 function = LED_FUNCTION_WLAN;
64 color = <LED_COLOR_ID_GREEN>;
65 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
66 linux,default-trigger = "phy0tpt";
67 };
68 };
69
70 keys {
71 compatible = "gpio-keys";
72
73 reset {
74 label = "reset";
75 linux,code = <KEY_RESTART>;
76 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
77 debounce-interval = <60>;
78 };
79 };
80 };
81
82 &pinmux {
83 led_rssilow_pin: pinmux_rssilow_pin {
84 pinctrl-single,bits = <0x8 0x0 0xff000000>;
85 };
86
87 led_rssimediumhigh_pin: pinmux_rssimediumhigh_pin {
88 pinctrl-single,bits = <0xc 0x0 0x00ff0000>;
89 };
90
91 led_rssihigh_pin: pinmux_rssihigh_pin {
92 pinctrl-single,bits = <0x10 0x0 0x000000ff>;
93 };
94 };
95
96 &spi {
97 status = "okay";
98
99 flash@0 {
100 compatible = "winbond,w25q128", "jedec,spi-nor";
101 reg = <0>;
102 spi-max-frequency = <25000000>;
103
104 partitions {
105 compatible = "fixed-partitions";
106 #address-cells = <1>;
107 #size-cells = <1>;
108
109 partition@0 {
110 label = "u-boot";
111 reg = <0x000000 0x010000>;
112 read-only;
113 };
114
115 art: partition@10000 {
116 label = "art";
117 reg = <0x010000 0x010000>;
118 read-only;
119
120 nvmem-layout {
121 compatible = "fixed-layout";
122 #address-cells = <1>;
123 #size-cells = <1>;
124
125 macaddr_art_0: macaddr@0 {
126 reg = <0x0 0x6>;
127 };
128
129 macaddr_art_6: macaddr@6 {
130 reg = <0x6 0x6>;
131 };
132
133 macaddr_art_1002: macaddr@1002 {
134 reg = <0x1002 0x6>;
135 };
136 };
137 };
138
139 partition@20000 {
140 compatible = "denx,uimage";
141 label = "firmware";
142 reg = <0x020000 0xfd0000>;
143 };
144
145 partition@ff0000 {
146 label = "nvram";
147 reg = <0xff0000 0x010000>;
148 read-only;
149 };
150 };
151 };
152 };
153
154 &eth0 {
155 status = "okay";
156
157 phy-handle = <&swphy4>;
158
159 nvmem-cells = <&macaddr_art_0>;
160 nvmem-cell-names = "mac-address";
161 };
162
163 &eth1 {
164 nvmem-cells = <&macaddr_art_1002>;
165 nvmem-cell-names = "mac-address";
166
167 gmac-config {
168 device = <&gmac>;
169 };
170 };
171
172 &wmac {
173 status = "okay";
174
175 mtd-cal-data = <&art 0x1000>;
176 nvmem-cells = <&macaddr_art_6>;
177 nvmem-cell-names = "mac-address";
178 };