target/linux/ath79/dts/qca9557_engenius_eap1200h.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qca955x_senao_loader.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         compatible = "engenius,eap1200h", "qca,qca9557";
  11         model = "EnGenius EAP1200H";
  12
  13         aliases {
  14                 label-mac-device = &eth0;
  15                 led-boot = &led_power;
  16                 led-failsafe = &led_power;
  17                 led-running = &led_power;
  18                 led-upgrade = &led_power;
  19         };
  20
  21         keys {
  22                 compatible = "gpio-keys";
  23
  24                 reset {
  25                         label = "reset";
  26                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  27                         debounce-interval = <60>;
  28                         linux,code = <KEY_RESTART>;
  29                 };
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34
  35                 led_power: power {
  36                         function = LED_FUNCTION_POWER;
  37                         color = <LED_COLOR_ID_AMBER>;
  38                         gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
  39                         default-state = "on";
  40                 };
  41
  42                 wifi2g {
  43                         label = "blue:wifi2g";
  44                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  45                         linux,default-trigger = "phy1tpt";
  46                 };
  47
  48                 wifi5g {
  49                         label = "green:wifi5g";
  50                         gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
  51                         linux,default-trigger = "phy0tpt";
  52                 };
  53
  54                 wps {
  55                         function = LED_FUNCTION_WPS;
  56                         color = <LED_COLOR_ID_BLUE>;
  57                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  58                 };
  59         };
  60 };
  61
  62 &partitions {
  63         partition@ff0000 {
  64                 label = "art";
  65                 reg = <0xff0000 0x010000>;
  66                 read-only;
  67
  68                 nvmem-layout {
  69                         compatible = "fixed-layout";
  70                         #address-cells = <1>;
  71                         #size-cells = <1>;
  72
  73                         macaddr_art_0: macaddr@0 {
  74                                 compatible = "mac-base";
  75                                 reg = <0x0 0x6>;
  76                                 #nvmem-cell-cells = <1>;
  77                         };
  78
  79                         calibration_art_1000: calibration@1000 {
  80                                 reg = <0x1000 0x440>;
  81                         };
  82
  83                         calibration_art_5000: calibration@5000 {
  84                                 reg = <0x5000 0x844>;
  85                         };
  86                 };
  87         };
  88 };
  89
  90 &mdio0 {
  91         status = "okay";
  92
  93         phy5: ethernet-phy@5 {
  94                 reg = <5>;
  95                 eee-broken-100tx;
  96                 eee-broken-1000t;
  97         };
  98 };
  99
 100 &eth0 {
 101         status = "okay";
 102
 103         nvmem-cells = <&macaddr_art_0 0>;
 104         nvmem-cell-names = "mac-address";
 105
 106         phy-handle = <&phy5>;
 107         phy-mode = "rgmii-id";
 108
 109         pll-data = <0x82000000 0x80000101 0x80001313>;
 110 };
 111
 112 &wmac {
 113         status = "okay";
 114
 115         nvmem-cells = <&macaddr_art_0 1>, <&calibration_art_1000>;
 116         nvmem-cell-names = "mac-address", "calibration";
 117 };
 118
 119 &ath10k_0 {
 120         status = "okay";
 121
 122         nvmem-cells = <&macaddr_art_0 2>, <&calibration_art_5000>;
 123         nvmem-cell-names = "mac-address", "calibration";
 124 };
 125
 126 &pcie0 {
 127         status = "okay";
 128 };