ath79: update WA/XC devices UBNT_VERSION to 8.7.4
[openwrt/staging/wigyori.git] / target / linux / ath79 / dts / qca9563_glinet_gl-x1200.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 aliases {
10 led-boot = &led_system;
11 led-failsafe = &led_system;
12 led-running = &led_system;
13 led-upgrade = &led_system;
14 label-mac-device = &eth0;
15 };
16
17 keys {
18 compatible = "gpio-keys";
19
20 pinctrl-names = "default";
21 pinctrl-0 = <&jtag_disable_pins>;
22
23 reset {
24 label = "reset";
25 linux,code = <KEY_RESTART>;
26 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
27 };
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 led_system: system {
34 label = "red:system";
35 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
36 default-state = "keep";
37 };
38
39 wlan2g {
40 label = "green:wlan2g";
41 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
42 linux,default-trigger = "phy1tpt";
43 };
44
45 wlan5g {
46 label = "green:wlan5g";
47 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
48 linux,default-trigger = "phy0tpt";
49 };
50 };
51
52 gpio-export {
53 compatible = "gpio-export";
54
55 gpio_modem1_power {
56 gpio-export,name = "gl-x1200:4g1:power";
57 gpio-export,output = <0>;
58 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
59 };
60
61 gpio_modem2_power {
62 gpio-export,name = "gl-x1200:4g2:power";
63 gpio-export,output = <0>;
64 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
65 };
66 };
67 };
68
69 &spi {
70 status = "okay";
71
72 flash@0 {
73 compatible = "jedec,spi-nor";
74 reg = <0>;
75 spi-max-frequency = <25000000>;
76
77 nor_partitions: partitions {
78 compatible = "fixed-partitions";
79 #address-cells = <1>;
80 #size-cells = <1>;
81
82 partition@0 {
83 label = "u-boot";
84 reg = <0x000000 0x040000>;
85 read-only;
86 };
87
88 partition@40000 {
89 label = "u-boot-env";
90 reg = <0x040000 0x010000>;
91 };
92
93 partition@50000 {
94 label = "art";
95 reg = <0x050000 0x010000>;
96 read-only;
97
98 nvmem-layout {
99 compatible = "fixed-layout";
100 #address-cells = <1>;
101 #size-cells = <1>;
102
103 calibration_ath9k: calibration@1000 {
104 reg = <0x1000 0x440>;
105 };
106
107 calibration_ath10k: calibration@5000 {
108 reg = <0x5000 0x2f20>;
109 };
110
111 macaddr_art_0: macaddr@0 {
112 reg = <0x0 0x6>;
113 };
114
115 macaddr_art_1002: macaddr@1002 {
116 reg = <0x1002 0x6>;
117 };
118
119 macaddr_art_5006: macaddr@5006 {
120 reg = <0x5006 0x6>;
121 };
122 };
123 };
124
125 /* Firmware / Kernel flash type specific */
126 };
127 };
128
129 flash@1 {
130 compatible = "spi-nand";
131 reg = <1>;
132 spi-max-frequency = <25000000>;
133
134 partitions {
135 compatible = "fixed-partitions";
136 #address-cells = <1>;
137 #size-cells = <1>;
138
139 nand_ubi: partition@0 {
140 label = "nand_ubi";
141 reg = <0x000000 0x8000000>;
142 };
143 };
144 };
145 };
146
147 &eth0 {
148 status = "okay";
149
150 phy-handle = <&phy0>;
151
152 nvmem-cells = <&macaddr_art_0>;
153 nvmem-cell-names = "mac-address";
154 };
155
156 &gpio {
157 usb_vbus {
158 gpio-hog;
159 gpios = <7 GPIO_ACTIVE_HIGH>;
160 output-high;
161 line-name = "usb-vbus";
162 };
163 };
164
165 &mdio0 {
166 status = "okay";
167
168 phy0: ethernet-phy@0 {
169 reg = <0>;
170 phy-mode = "sgmii";
171 qca,ar8327-initvals = <
172 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
173 0x7c 0x0000007e /* PORT0_STATUS */
174 >;
175 };
176 };
177
178 &pcie {
179 status = "okay";
180
181 wifi@0,0 {
182 compatible = "qcom,ath10k";
183 reg = <0 0 0 0 0>;
184
185 nvmem-cells = <&macaddr_art_5006>, <&calibration_ath10k>;
186 nvmem-cell-names = "mac-address", "pre-calibration";
187 };
188 };
189
190 &usb0 {
191 status = "okay";
192 };
193
194 &usb1 {
195 status = "okay";
196 };
197
198 &usb_phy0 {
199 status = "okay";
200 };
201
202 &usb_phy1 {
203 status = "okay";
204 };
205
206 &wmac {
207 status = "okay";
208
209 nvmem-cells = <&macaddr_art_1002>, <&calibration_ath9k>;
210 nvmem-cell-names = "mac-address", "calibration";
211 };