target/linux/ath79/dts/qca9563_phicomm_k2t.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qca956x.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         model = "Phicomm K2T";
  11         compatible = "phicomm,k2t", "qca,qca9563";
  12
  13         aliases {
  14                 led-boot = &led_status_red;
  15                 led-failsafe = &led_status_red;
  16                 led-running = &led_status_red;
  17                 led-upgrade = &led_status_red;
  18         };
  19
  20         leds {
  21                 compatible = "gpio-leds";
  22
  23                 status_blue {
  24                         function = LED_FUNCTION_STATUS;
  25                         color = <LED_COLOR_ID_BLUE>;
  26                         gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
  27                 };
  28
  29                 led_status_red: status_red {
  30                         function = LED_FUNCTION_STATUS;
  31                         color = <LED_COLOR_ID_RED>;
  32                         gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
  33                 };
  34
  35                 status_yellow {
  36                         function = LED_FUNCTION_STATUS;
  37                         color = <LED_COLOR_ID_YELLOW>;
  38                         gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
  39                 };
  40         };
  41
  42         keys {
  43                 compatible = "gpio-keys";
  44
  45                 reset {
  46                         linux,code = <KEY_RESTART>;
  47                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
  48                         debounce-interval = <60>;
  49                 };
  50         };
  51 };
  52
  53 &pcie {
  54         status = "okay";
  55
  56         wifi@0,0 {
  57                 compatible = "qcom,ath10k";
  58                 reg = <0x0000 0 0 0 0>;
  59                 nvmem-cells = <&precal_art_5000>;
  60                 nvmem-cell-names = "pre-calibration";
  61         };
  62 };
  63
  64 &spi {
  65         status = "okay";
  66
  67         flash@0 {
  68                 compatible = "jedec,spi-nor";
  69                 reg = <0>;
  70                 spi-max-frequency = <25000000>;
  71
  72                 partitions {
  73                         compatible = "fixed-partitions";
  74                         #address-cells = <1>;
  75                         #size-cells = <1>;
  76
  77                         partition@0 {
  78                                 label = "u-boot";
  79                                 reg = <0x000000 0x30000>;
  80                                 read-only;
  81                         };
  82
  83                         partition@30000 {
  84                                 label = "config";
  85                                 reg = <0x030000 0x10000>;
  86                                 read-only;
  87                         };
  88
  89                         partition@40000 {
  90                                 label = "permanent";
  91                                 reg = <0x040000 0x50000>;
  92                                 read-only;
  93                         };
  94
  95                         partition@90000 {
  96                                 compatible = "denx,uimage";
  97                                 label = "firmware";
  98                                 reg = <0x090000 0xf60000>;
  99                         };
 100
 101                         art: partition@ff0000 {
 102                                 label = "art";
 103                                 reg = <0xff0000 0x010000>;
 104                                 read-only;
 105
 106                                 nvmem-layout {
 107                                         compatible = "fixed-layout";
 108                                         #address-cells = <1>;
 109                                         #size-cells = <1>;
 110
 111                                         precal_art_5000: pre-calibration@5000 {
 112                                                 reg = <0x5000 0x2f20>;
 113                                         };
 114                                 };
 115                         };
 116                 };
 117         };
 118 };
 119
 120 &mdio0 {
 121         status = "okay";
 122
 123         phy0: ethernet-phy@0 {
 124                 reg = <0>;
 125                 phy-mode = "sgmii";
 126
 127                 qca,ar8327-initvals = <
 128                         0x04 0x00080080 /* PORT0 PAD MODE CTRL */
 129                         0x10 0x81000080 /* POWER_ON_STRAP */
 130                         0x50 0xcc35cc35 /* LED_CTRL0 */
 131                         0x54 0xcb37cb37 /* LED_CTRL1 */
 132                         0x58 0x00000000 /* LED_CTRL2 */
 133                         0x5c 0x00f3cf00 /* LED_CTRL3 */
 134                         0x7c 0x0000007e /* PORT0_STATUS */
 135                         >;
 136         };
 137 };
 138
 139 &eth0 {
 140         status = "okay";
 141
 142         pll-data = <0x03000101 0x00000101 0x00001919>;
 143
 144         phy-mode = "sgmii";
 145         phy-handle = <&phy0>;
 146 };
 147
 148 &wmac {
 149         status = "okay";
 150         mtd-cal-data = <&art 0x1000>;
 151 };