opensbi: bump to 1.4
[openwrt/openwrt.git] / target / linux / at91 / patches-5.10 / 193-media-atmel-atmel-sama5d2-isc-fix-YUYV-format.patch
1 From 21261e30679118b96ed537d1cdf9e12682fc1b29 Mon Sep 17 00:00:00 2001
2 From: Eugen Hristev <eugen.hristev@microchip.com>
3 Date: Wed, 9 Jun 2021 15:00:28 +0200
4 Subject: [PATCH 193/247] media: atmel: atmel-sama5d2-isc: fix YUYV format
5
6 SAMA5D2 does not have the YCYC field for the RLP (rounding, limiting,
7 packaging) module.
8 The YCYC field is supposed to work with interleaved YUV formats like YUYV.
9 In SAMA5D2, we have to use YYCC field, which is used for both planar
10 formats like YUV420 and interleaved formats like YUYV.
11 Fix the according rlp callback to replace the generic YCYC field (which
12 makes more sense from a logical point of view) with the required YYCC
13 field.
14
15 Fixes: debfa496871c ("media: atmel: atmel-isc-base: add support for more formats and additional pipeline modules")
16 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
17 Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
18 Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
19 ---
20 .../media/platform/atmel/atmel-sama5d2-isc.c | 17 +++++++++++++++++
21 1 file changed, 17 insertions(+)
22
23 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
24 +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
25 @@ -255,6 +255,23 @@ static void isc_sama5d2_config_rlp(struc
26 struct regmap *regmap = isc->regmap;
27 u32 rlp_mode = isc->config.rlp_cfg_mode;
28
29 + /*
30 + * In sama5d2, the YUV planar modes and the YUYV modes are treated
31 + * in the same way in RLP register.
32 + * Normally, YYCC mode should be Luma(n) - Color B(n) - Color R (n)
33 + * and YCYC should be Luma(n + 1) - Color B (n) - Luma (n) - Color R (n)
34 + * but in sama5d2, the YCYC mode does not exist, and YYCC must be
35 + * selected for both planar and interleaved modes, as in fact
36 + * both modes are supported.
37 + *
38 + * Thus, if the YCYC mode is selected, replace it with the
39 + * sama5d2-compliant mode which is YYCC .
40 + */
41 + if ((rlp_mode & ISC_RLP_CFG_MODE_YCYC) == ISC_RLP_CFG_MODE_YCYC) {
42 + rlp_mode &= ~ISC_RLP_CFG_MODE_MASK;
43 + rlp_mode |= ISC_RLP_CFG_MODE_YYCC;
44 + }
45 +
46 regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp,
47 ISC_RLP_CFG_MODE_MASK, rlp_mode);
48 }