tools/elfutils: refresh portability patch for macOS
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar9344.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar934x.dtsi"
4
5 / {
6 compatible = "qca,ar9344";
7 };
8
9 &cpuintc {
10 qca,ddr-wb-channel-interrupts = <3>, <4>, <5>;
11 qca,ddr-wb-channels = <&ddr_ctrl 2>, <&ddr_ctrl 0>,
12 <&ddr_ctrl 1>;
13 };
14
15 &rst {
16 intc2: interrupt-controller {
17 compatible = "qca,ar9340-intc";
18
19 interrupt-parent = <&cpuintc>;
20 interrupts = <2>;
21
22 interrupt-controller;
23 #interrupt-cells = <1>;
24
25 qca,int-status-addr = <0xac>;
26 qca,pending-bits = <0xf>, /* wmac */
27 <0x1f0>; /* pcie rc1 */
28
29 qca,ddr-wb-channel-interrupts = <0>, <1>;
30 qca,ddr-wb-channels = <&ddr_ctrl 4>, <&ddr_ctrl 3>;
31 };
32 };
33
34 &ahb {
35 pcie: pcie-controller@180c0000 {
36 compatible = "qcom,ar9340-pci", "qcom,ar7240-pci";
37 #address-cells = <3>;
38 #size-cells = <2>;
39 bus-range = <0x0 0x0>;
40 reg = <0x180c0000 0x1000>, /* CRP */
41 <0x180f0000 0x100>, /* CTRL */
42 <0x14000000 0x1000>; /* CFG */
43 reg-names = "crp_base", "ctrl_base", "cfg_base";
44 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
45 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
46 interrupt-parent = <&intc2>;
47 interrupts = <1>;
48
49 device_type = "pci";
50
51 resets = <&rst 6>, <&rst 7>;
52 reset-names = "hc", "phy";
53
54 interrupt-controller;
55 #interrupt-cells = <1>;
56
57 interrupt-map-mask = <0 0 0 1>;
58 interrupt-map = <0 0 0 0 &pcie 0>;
59
60 status = "disabled";
61 };
62 };
63
64 &wmac {
65 interrupt-parent = <&intc2>;
66 interrupts = <0>;
67 };