target/linux/generic/backport-5.10/785-v5.14-12-net-dsa-qca8k-limit-port5-delay-to-qca8337.patch

   1 From 5bf9ff3b9fb5ecb67a1a3517b26db3a00f2a2f11 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Fri, 14 May 2021 23:00:02 +0200
   4 Subject: [PATCH] net: dsa: qca8k: limit port5 delay to qca8337
   5
   6 Limit port5 rx delay to qca8337. This is taken from the legacy QSDK code
   7 that limits the rx delay on port5 to only this particular switch version,
   8 on other switch only the tx and rx delay for port0 are needed.
   9
  10 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  11 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  12 Signed-off-by: David S. Miller <davem@davemloft.net>
  13 ---
  14  drivers/net/dsa/qca8k.c | 6 ++++--
  15  1 file changed, 4 insertions(+), 2 deletions(-)
  16
  17 --- a/drivers/net/dsa/qca8k.c
  18 +++ b/drivers/net/dsa/qca8k.c
  19 @@ -1003,8 +1003,10 @@ qca8k_phylink_mac_config(struct dsa_swit
  20                             QCA8K_PORT_PAD_RGMII_EN |
  21                             QCA8K_PORT_PAD_RGMII_TX_DELAY(QCA8K_MAX_DELAY) |
  22                             QCA8K_PORT_PAD_RGMII_RX_DELAY(QCA8K_MAX_DELAY));
  23 -               qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
  24 -                           QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
  25 +               /* QCA8337 requires to set rgmii rx delay */
  26 +               if (priv->switch_id == QCA8K_ID_QCA8337)
  27 +                       qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
  28 +                                   QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
  29                 break;
  30         case PHY_INTERFACE_MODE_SGMII:
  31         case PHY_INTERFACE_MODE_1000BASEX: