target/linux/generic/files/drivers/platform/mikrotik/rb_softconfig.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Driver for MikroTik RouterBoot soft config.
   4  *
   5  * Copyright (C) 2020 Thibaut VARÈNE <hacks+kernel@slashdirt.org>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  *
  11  * This driver exposes the data encoded in the "soft_config" flash segment of
  12  * MikroTik RouterBOARDs devices. It presents the data in a sysfs folder
  13  * named "soft_config". The data is presented in a user/machine-friendly way
  14  * with just as much parsing as can be generalized across mikrotik platforms
  15  * (as inferred from reverse-engineering).
  16  *
  17  * The known soft_config tags are presented in the "soft_config" sysfs folder,
  18  * with the addition of one specific file named "commit", which is only
  19  * available if the driver supports writes to the mtd device: no modifications
  20  * made to any of the other attributes are actually written back to flash media
  21  * until a true value is input into this file (e.g. [Yy1]). This is to avoid
  22  * unnecessary flash wear, and to permit to revert all changes by issuing a
  23  * false value ([Nn0]). Reading the content of this file shows the current
  24  * status of the driver: if the data in sysfs matches the content of the
  25  * soft_config partition, the file will read "clean". Otherwise, it will read
  26  * "dirty".
  27  *
  28  * The writeable sysfs files presented by this driver will accept only inputs
  29  * which are in a valid range for the given tag. As a design choice, the driver
  30  * will not assess whether the inputs are identical to the existing data.
  31  *
  32  * Note: PAGE_SIZE is assumed to be >= 4K, hence the device attribute show
  33  * routines need not check for output overflow.
  34  *
  35  * Some constant defines extracted from rbcfg.h by Gabor Juhos
  36  * <juhosg@openwrt.org>
  37  */
  38
  39 #include <linux/types.h>
  40 #include <linux/init.h>
  41 #include <linux/kernel.h>
  42 #include <linux/slab.h>
  43 #include <linux/errno.h>
  44 #include <linux/kobject.h>
  45 #include <linux/string.h>
  46 #include <linux/mtd/mtd.h>
  47 #include <linux/sysfs.h>
  48 #include <linux/version.h>
  49 #include <linux/capability.h>
  50 #include <linux/spinlock.h>
  51 #include <linux/crc32.h>
  52
  53 #ifdef CONFIG_ATH79
  54  #include <asm/mach-ath79/ath79.h>
  55 #endif
  56
  57 #include "routerboot.h"
  58
  59 #define RB_SOFTCONFIG_VER               "0.05"
  60 #define RB_SC_PR_PFX                    "[rb_softconfig] "
  61
  62 #define RB_SC_HAS_WRITE_SUPPORT true
  63 #define RB_SC_WMODE                     S_IWUSR
  64 #define RB_SC_RMODE                     S_IRUSR
  65
  66 /* ID values for software settings */
  67 #define RB_SCID_UART_SPEED              0x01    // u32*1
  68 #define RB_SCID_BOOT_DELAY              0x02    // u32*1
  69 #define RB_SCID_BOOT_DEVICE             0x03    // u32*1
  70 #define RB_SCID_BOOT_KEY                0x04    // u32*1
  71 #define RB_SCID_CPU_MODE                0x05    // u32*1
  72 #define RB_SCID_BIOS_VERSION            0x06    // str
  73 #define RB_SCID_BOOT_PROTOCOL           0x09    // u32*1
  74 #define RB_SCID_CPU_FREQ_IDX            0x0C    // u32*1
  75 #define RB_SCID_BOOTER                  0x0D    // u32*1
  76 #define RB_SCID_SILENT_BOOT             0x0F    // u32*1
  77 /*
  78  * protected_routerboot seems to use tag 0x1F. It only works in combination with
  79  * RouterOS, resulting in a wiped board otherwise, so it's not implemented here.
  80  * The tag values are as follows:
  81  * - off: 0x0
  82  * - on: the lower halfword encodes the max value in s for the reset feature,
  83  *       the higher halfword encodes the min value in s for the reset feature.
  84  * Default value when on: 0x00140258: 0x14 = 20s / 0x258= 600s
  85  * See details here: https://wiki.mikrotik.com/wiki/Manual:RouterBOARD_settings#Protected_bootloader
  86  */
  87
  88 /* Tag values */
  89
  90 #define RB_UART_SPEED_115200            0
  91 #define RB_UART_SPEED_57600             1
  92 #define RB_UART_SPEED_38400             2
  93 #define RB_UART_SPEED_19200             3
  94 #define RB_UART_SPEED_9600              4
  95 #define RB_UART_SPEED_4800              5
  96 #define RB_UART_SPEED_2400              6
  97 #define RB_UART_SPEED_1200              7
  98 #define RB_UART_SPEED_OFF               8
  99
 100 /* valid boot delay: 1 - 9s in 1s increment */
 101 #define RB_BOOT_DELAY_MIN               1
 102 #define RB_BOOT_DELAY_MAX               9
 103
 104 #define RB_BOOT_DEVICE_ETHER            0       // "boot over Ethernet"
 105 #define RB_BOOT_DEVICE_NANDETH          1       // "boot from NAND, if fail then Ethernet"
 106 #define RB_BOOT_DEVICE_CFCARD           2       // (not available in rbcfg)
 107 #define RB_BOOT_DEVICE_ETHONCE          3       // "boot Ethernet once, then NAND"
 108 #define RB_BOOT_DEVICE_NANDONLY         5       // "boot from NAND only"
 109 #define RB_BOOT_DEVICE_FLASHCFG         7       // "boot in flash configuration mode"
 110 #define RB_BOOT_DEVICE_FLSHONCE         8       // "boot in flash configuration mode once, then NAND"
 111
 112 /*
 113  * ATH79 9xxx CPU frequency indices.
 114  * It is unknown if they apply to all ATH79 RBs, and some do not seem to feature
 115  * the upper levels (QCA955x), while F is presumably AR9344-only.
 116  */
 117 #define RB_CPU_FREQ_IDX_ATH79_9X_A      (0 << 3)
 118 #define RB_CPU_FREQ_IDX_ATH79_9X_B      (1 << 3)        // 0x8
 119 #define RB_CPU_FREQ_IDX_ATH79_9X_C      (2 << 3)        // 0x10 - factory freq for many devices
 120 #define RB_CPU_FREQ_IDX_ATH79_9X_D      (3 << 3)        // 0x18
 121 #define RB_CPU_FREQ_IDX_ATH79_9X_E      (4 << 3)        // 0x20
 122 #define RB_CPU_FREQ_IDX_ATH79_9X_F      (5 << 3)        // 0x28
 123
 124 #define RB_CPU_FREQ_IDX_ATH79_9X_MIN            0       // all devices support lowest setting
 125 #define RB_CPU_FREQ_IDX_ATH79_9X_AR9334_MAX     5       // stops at F
 126 #define RB_CPU_FREQ_IDX_ATH79_9X_QCA953X_MAX    4       // stops at E
 127 #define RB_CPU_FREQ_IDX_ATH79_9X_QCA9556_MAX    2       // stops at C
 128 #define RB_CPU_FREQ_IDX_ATH79_9X_QCA9558_MAX    3       // stops at D
 129
 130 /* ATH79 7xxx CPU frequency indices. */
 131 #define RB_CPU_FREQ_IDX_ATH79_7X_A      ((0 * 9) << 4)
 132 #define RB_CPU_FREQ_IDX_ATH79_7X_B      ((1 * 9) << 4)
 133 #define RB_CPU_FREQ_IDX_ATH79_7X_C      ((2 * 9) << 4)
 134 #define RB_CPU_FREQ_IDX_ATH79_7X_D      ((3 * 9) << 4)
 135 #define RB_CPU_FREQ_IDX_ATH79_7X_E      ((4 * 9) << 4)
 136 #define RB_CPU_FREQ_IDX_ATH79_7X_F      ((5 * 9) << 4)
 137 #define RB_CPU_FREQ_IDX_ATH79_7X_G      ((6 * 9) << 4)
 138 #define RB_CPU_FREQ_IDX_ATH79_7X_H      ((7 * 9) << 4)
 139
 140 #define RB_CPU_FREQ_IDX_ATH79_7X_MIN            0       // all devices support lowest setting
 141 #define RB_CPU_FREQ_IDX_ATH79_7X_AR724X_MAX     3       // stops at D
 142 #define RB_CPU_FREQ_IDX_ATH79_7X_AR7161_MAX     7       // stops at H - check if applies to all AR71xx devices
 143
 144 #define RB_SC_CRC32_OFFSET              4       // located right after magic
 145
 146 static struct kobject *sc_kobj;
 147 static u8 *sc_buf;
 148 static size_t sc_buflen;
 149 static rwlock_t sc_bufrwl;              // rw lock to sc_buf
 150
 151 /* MUST be used with lock held */
 152 #define RB_SC_CLRCRC()          *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = 0
 153 #define RB_SC_GETCRC()          *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET)
 154 #define RB_SC_SETCRC(_crc)      *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = (_crc)
 155
 156 struct sc_u32tvs {
 157         const u32 val;
 158         const char *str;
 159 };
 160
 161 #define RB_SC_TVS(_val, _str) {         \
 162         .val = (_val),                  \
 163         .str = (_str),                  \
 164 }
 165
 166 static ssize_t sc_tag_show_u32tvs(const u8 *pld, u16 pld_len, char *buf,
 167                                   const struct sc_u32tvs tvs[], const int tvselmts)
 168 {
 169         const char *fmt;
 170         char *out = buf;
 171         u32 data;       // cpu-endian
 172         int i;
 173
 174         // fallback to raw hex output if we can't handle the input
 175         if (tvselmts < 0)
 176                 return routerboot_tag_show_u32s(pld, pld_len, buf);
 177
 178         if (sizeof(data) != pld_len)
 179                 return -EINVAL;
 180
 181         read_lock(&sc_bufrwl);
 182         data = *(u32 *)pld;             // pld aliases sc_buf
 183         read_unlock(&sc_bufrwl);
 184
 185         for (i = 0; i < tvselmts; i++) {
 186                 fmt = (tvs[i].val == data) ? "[%s] " : "%s ";
 187                 out += sprintf(out, fmt, tvs[i].str);
 188         }
 189
 190         out += sprintf(out, "\n");
 191         return out - buf;
 192 }
 193
 194 static ssize_t sc_tag_store_u32tvs(const u8 *pld, u16 pld_len, const char *buf, size_t count,
 195                                    const struct sc_u32tvs tvs[], const int tvselmts)
 196 {
 197         int i;
 198
 199         if (tvselmts < 0)
 200                 return tvselmts;
 201
 202         if (sizeof(u32) != pld_len)
 203                 return -EINVAL;
 204
 205         for (i = 0; i < tvselmts; i++) {
 206                 if (sysfs_streq(buf, tvs[i].str)) {
 207                         write_lock(&sc_bufrwl);
 208                         *(u32 *)pld = tvs[i].val;       // pld aliases sc_buf
 209                         RB_SC_CLRCRC();
 210                         write_unlock(&sc_bufrwl);
 211                         return count;
 212                 }
 213         }
 214
 215         return -EINVAL;
 216 }
 217
 218 struct sc_boolts {
 219         const char *strfalse;
 220         const char *strtrue;
 221 };
 222
 223 static ssize_t sc_tag_show_boolts(const u8 *pld, u16 pld_len, char *buf,
 224                                   const struct sc_boolts *bts)
 225 {
 226         const char *fmt;
 227         char *out = buf;
 228         u32 data;       // cpu-endian
 229
 230         if (sizeof(data) != pld_len)
 231                 return -EINVAL;
 232
 233         read_lock(&sc_bufrwl);
 234         data = *(u32 *)pld;             // pld aliases sc_buf
 235         read_unlock(&sc_bufrwl);
 236
 237         fmt = (data) ? "%s [%s]\n" : "[%s] %s\n";
 238         out += sprintf(out, fmt, bts->strfalse, bts->strtrue);
 239
 240         return out - buf;
 241 }
 242
 243 static ssize_t sc_tag_store_boolts(const u8 *pld, u16 pld_len, const char *buf, size_t count,
 244                                    const struct sc_boolts *bts)
 245 {
 246         u32 data;       // cpu-endian
 247
 248         if (sizeof(data) != pld_len)
 249                 return -EINVAL;
 250
 251         if (sysfs_streq(buf, bts->strfalse))
 252                 data = 0;
 253         else if (sysfs_streq(buf, bts->strtrue))
 254                 data = 1;
 255         else
 256                 return -EINVAL;
 257
 258         write_lock(&sc_bufrwl);
 259         *(u32 *)pld = data;             // pld aliases sc_buf
 260         RB_SC_CLRCRC();
 261         write_unlock(&sc_bufrwl);
 262
 263         return count;
 264 }
 265 static struct sc_u32tvs const sc_uartspeeds[] = {
 266         RB_SC_TVS(RB_UART_SPEED_OFF,    "off"),
 267         RB_SC_TVS(RB_UART_SPEED_1200,   "1200"),
 268         RB_SC_TVS(RB_UART_SPEED_2400,   "2400"),
 269         RB_SC_TVS(RB_UART_SPEED_4800,   "4800"),
 270         RB_SC_TVS(RB_UART_SPEED_9600,   "9600"),
 271         RB_SC_TVS(RB_UART_SPEED_19200,  "19200"),
 272         RB_SC_TVS(RB_UART_SPEED_38400,  "38400"),
 273         RB_SC_TVS(RB_UART_SPEED_57600,  "57600"),
 274         RB_SC_TVS(RB_UART_SPEED_115200, "115200"),
 275 };
 276
 277 /*
 278  * While the defines are carried over from rbcfg, use strings that more clearly
 279  * show the actual setting purpose (especially since the NAND* settings apply
 280  * to both nand- and nor-based devices). "cfcard" was disabled in rbcfg: disable
 281  * it here too.
 282  */
 283 static struct sc_u32tvs const sc_bootdevices[] = {
 284         RB_SC_TVS(RB_BOOT_DEVICE_ETHER,         "eth"),
 285         RB_SC_TVS(RB_BOOT_DEVICE_NANDETH,       "flasheth"),
 286         //RB_SC_TVS(RB_BOOT_DEVICE_CFCARD,      "cfcard"),
 287         RB_SC_TVS(RB_BOOT_DEVICE_ETHONCE,       "ethonce"),
 288         RB_SC_TVS(RB_BOOT_DEVICE_NANDONLY,      "flash"),
 289         RB_SC_TVS(RB_BOOT_DEVICE_FLASHCFG,      "cfg"),
 290         RB_SC_TVS(RB_BOOT_DEVICE_FLSHONCE,      "cfgonce"),
 291 };
 292
 293 static struct sc_boolts const sc_bootkey = {
 294         .strfalse = "any",
 295         .strtrue = "del",
 296 };
 297
 298 static struct sc_boolts const sc_cpumode = {
 299         .strfalse = "powersave",
 300         .strtrue = "regular",
 301 };
 302
 303 static struct sc_boolts const sc_bootproto = {
 304         .strfalse = "bootp",
 305         .strtrue = "dhcp",
 306 };
 307
 308 static struct sc_boolts const sc_booter = {
 309         .strfalse = "regular",
 310         .strtrue = "backup",
 311 };
 312
 313 static struct sc_boolts const sc_silent_boot = {
 314         .strfalse = "off",
 315         .strtrue = "on",
 316 };
 317
 318 #define SC_TAG_SHOW_STORE_U32TVS_FUNCS(_name)           \
 319 static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf)       \
 320 {                                                                               \
 321         return sc_tag_show_u32tvs(pld, pld_len, buf, sc_##_name, ARRAY_SIZE(sc_##_name));       \
 322 }                                                                               \
 323 static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count)  \
 324 {                                                                               \
 325         return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_##_name, ARRAY_SIZE(sc_##_name));       \
 326 }
 327
 328 #define SC_TAG_SHOW_STORE_BOOLTS_FUNCS(_name)           \
 329 static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf)       \
 330 {                                                                               \
 331         return sc_tag_show_boolts(pld, pld_len, buf, &sc_##_name);      \
 332 }                                                                               \
 333 static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count)  \
 334 {                                                                               \
 335         return sc_tag_store_boolts(pld, pld_len, buf, count, &sc_##_name);      \
 336 }
 337
 338 SC_TAG_SHOW_STORE_U32TVS_FUNCS(uartspeeds)
 339 SC_TAG_SHOW_STORE_U32TVS_FUNCS(bootdevices)
 340 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootkey)
 341 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(cpumode)
 342 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootproto)
 343 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(booter)
 344 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(silent_boot)
 345
 346 static ssize_t sc_tag_show_bootdelays(const u8 *pld, u16 pld_len, char *buf)
 347 {
 348         const char *fmt;
 349         char *out = buf;
 350         u32 data;       // cpu-endian
 351         int i;
 352
 353         if (sizeof(data) != pld_len)
 354                 return -EINVAL;
 355
 356         read_lock(&sc_bufrwl);
 357         data = *(u32 *)pld;             // pld aliases sc_buf
 358         read_unlock(&sc_bufrwl);
 359
 360         for (i = RB_BOOT_DELAY_MIN; i <= RB_BOOT_DELAY_MAX; i++) {
 361                 fmt = (i == data) ? "[%d] " : "%d ";
 362                 out += sprintf(out, fmt, i);
 363         }
 364
 365         out += sprintf(out, "\n");
 366         return out - buf;
 367 }
 368
 369 static ssize_t sc_tag_store_bootdelays(const u8 *pld, u16 pld_len, const char *buf, size_t count)
 370 {
 371         u32 data;       // cpu-endian
 372         int ret;
 373
 374         if (sizeof(data) != pld_len)
 375                 return -EINVAL;
 376
 377         ret = kstrtou32(buf, 10, &data);
 378         if (ret)
 379                 return ret;
 380
 381         if ((data < RB_BOOT_DELAY_MIN) || (RB_BOOT_DELAY_MAX < data))
 382                 return -EINVAL;
 383
 384         write_lock(&sc_bufrwl);
 385         *(u32 *)pld = data;             // pld aliases sc_buf
 386         RB_SC_CLRCRC();
 387         write_unlock(&sc_bufrwl);
 388
 389         return count;
 390 }
 391
 392 /* Support CPU frequency accessors only when the tag format has been asserted */
 393 #if defined(CONFIG_ATH79)
 394 /* Use the same letter-based nomenclature as RouterBOOT */
 395 static struct sc_u32tvs const sc_cpufreq_indexes_ath79_9x[] = {
 396         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_A,   "a"),
 397         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_B,   "b"),
 398         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_C,   "c"),
 399         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_D,   "d"),
 400         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_E,   "e"),
 401         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_9X_F,   "f"),
 402 };
 403
 404 static struct sc_u32tvs const sc_cpufreq_indexes_ath79_7x[] = {
 405         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_A,   "a"),
 406         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_B,   "b"),
 407         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_C,   "c"),
 408         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_D,   "d"),
 409         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_E,   "e"),
 410         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_F,   "f"),
 411         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_G,   "g"),
 412         RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_7X_H,   "h"),
 413 };
 414
 415 static int sc_tag_cpufreq_ath79_arraysize(void)
 416 {
 417         int idx_max;
 418
 419         if (ATH79_SOC_AR7161 == ath79_soc)
 420                 idx_max = RB_CPU_FREQ_IDX_ATH79_7X_AR7161_MAX+1;
 421         else if (soc_is_ar724x())
 422                 idx_max = RB_CPU_FREQ_IDX_ATH79_7X_AR724X_MAX+1;
 423         else if (soc_is_ar9344())
 424                 idx_max = RB_CPU_FREQ_IDX_ATH79_9X_AR9334_MAX+1;
 425         else if (soc_is_qca953x())
 426                 idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA953X_MAX+1;
 427         else if (soc_is_qca9556())
 428                 idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA9556_MAX+1;
 429         else if (soc_is_qca9558())
 430                 idx_max = RB_CPU_FREQ_IDX_ATH79_9X_QCA9558_MAX+1;
 431         else
 432                 idx_max = -EOPNOTSUPP;
 433
 434         return idx_max;
 435 }
 436
 437 static ssize_t sc_tag_show_cpufreq_indexes(const u8 *pld, u16 pld_len, char *buf)
 438 {
 439         const struct sc_u32tvs *tvs;
 440
 441         if (soc_is_ar71xx() || soc_is_ar724x())
 442                 tvs = sc_cpufreq_indexes_ath79_7x;
 443         else
 444                 tvs = sc_cpufreq_indexes_ath79_9x;
 445
 446         return sc_tag_show_u32tvs(pld, pld_len, buf, tvs, sc_tag_cpufreq_ath79_arraysize());
 447 }
 448
 449 static ssize_t sc_tag_store_cpufreq_indexes(const u8 *pld, u16 pld_len, const char *buf, size_t count)
 450 {
 451         const struct sc_u32tvs *tvs;
 452
 453         if (soc_is_ar71xx() || soc_is_ar724x())
 454                 tvs = sc_cpufreq_indexes_ath79_7x;
 455         else
 456                 tvs = sc_cpufreq_indexes_ath79_9x;
 457
 458         return sc_tag_store_u32tvs(pld, pld_len, buf, count, tvs, sc_tag_cpufreq_ath79_arraysize());
 459 }
 460 #else
 461  /* By default we only show the raw value to help with reverse-engineering */
 462  #define sc_tag_show_cpufreq_indexes    routerboot_tag_show_u32s
 463  #define sc_tag_store_cpufreq_indexes   NULL
 464 #endif
 465
 466 static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
 467                             char *buf);
 468 static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr,
 469                              const char *buf, size_t count);
 470
 471 /* Array of known tags to publish in sysfs */
 472 static struct sc_attr {
 473         const u16 tag_id;
 474         /* sysfs tag show attribute. Must lock sc_buf when dereferencing pld */
 475         ssize_t (* const tshow)(const u8 *pld, u16 pld_len, char *buf);
 476         /* sysfs tag store attribute. Must lock sc_buf when dereferencing pld */
 477         ssize_t (* const tstore)(const u8 *pld, u16 pld_len, const char *buf, size_t count);
 478         struct kobj_attribute kattr;
 479         u16 pld_ofs;
 480         u16 pld_len;
 481 } sc_attrs[] = {
 482         {
 483                 .tag_id = RB_SCID_UART_SPEED,
 484                 .tshow = sc_tag_show_uartspeeds,
 485                 .tstore = sc_tag_store_uartspeeds,
 486                 .kattr = __ATTR(uart_speed, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 487         }, {
 488                 .tag_id = RB_SCID_BOOT_DELAY,
 489                 .tshow = sc_tag_show_bootdelays,
 490                 .tstore = sc_tag_store_bootdelays,
 491                 .kattr = __ATTR(boot_delay, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 492         }, {
 493                 .tag_id = RB_SCID_BOOT_DEVICE,
 494                 .tshow = sc_tag_show_bootdevices,
 495                 .tstore = sc_tag_store_bootdevices,
 496                 .kattr = __ATTR(boot_device, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 497         }, {
 498                 .tag_id = RB_SCID_BOOT_KEY,
 499                 .tshow = sc_tag_show_bootkey,
 500                 .tstore = sc_tag_store_bootkey,
 501                 .kattr = __ATTR(boot_key, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 502         }, {
 503                 .tag_id = RB_SCID_CPU_MODE,
 504                 .tshow = sc_tag_show_cpumode,
 505                 .tstore = sc_tag_store_cpumode,
 506                 .kattr = __ATTR(cpu_mode, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 507         }, {
 508                 .tag_id = RB_SCID_BIOS_VERSION,
 509                 .tshow = routerboot_tag_show_string,
 510                 .tstore = NULL,
 511                 .kattr = __ATTR(bios_version, RB_SC_RMODE, sc_attr_show, NULL),
 512         }, {
 513                 .tag_id = RB_SCID_BOOT_PROTOCOL,
 514                 .tshow = sc_tag_show_bootproto,
 515                 .tstore = sc_tag_store_bootproto,
 516                 .kattr = __ATTR(boot_proto, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 517         }, {
 518                 .tag_id = RB_SCID_CPU_FREQ_IDX,
 519                 .tshow = sc_tag_show_cpufreq_indexes,
 520                 .tstore = sc_tag_store_cpufreq_indexes,
 521                 .kattr = __ATTR(cpufreq_index, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 522         }, {
 523                 .tag_id = RB_SCID_BOOTER,
 524                 .tshow = sc_tag_show_booter,
 525                 .tstore = sc_tag_store_booter,
 526                 .kattr = __ATTR(booter, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 527         }, {
 528                 .tag_id = RB_SCID_SILENT_BOOT,
 529                 .tshow = sc_tag_show_silent_boot,
 530                 .tstore = sc_tag_store_silent_boot,
 531                 .kattr = __ATTR(silent_boot, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
 532         },
 533 };
 534
 535 static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
 536                             char *buf)
 537 {
 538         const struct sc_attr *sc_attr;
 539         const u8 *pld;
 540         u16 pld_len;
 541
 542         sc_attr = container_of(attr, typeof(*sc_attr), kattr);
 543
 544         if (!sc_attr->pld_len)
 545                 return -ENOENT;
 546
 547         pld = sc_buf + sc_attr->pld_ofs;        // pld aliases sc_buf -> lock!
 548         pld_len = sc_attr->pld_len;
 549
 550         return sc_attr->tshow(pld, pld_len, buf);
 551 }
 552
 553 static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr,
 554                              const char *buf, size_t count)
 555 {
 556         const struct sc_attr *sc_attr;
 557         const u8 *pld;
 558         u16 pld_len;
 559
 560         if (!RB_SC_HAS_WRITE_SUPPORT)
 561                 return -EOPNOTSUPP;
 562
 563         if (!capable(CAP_SYS_ADMIN))
 564                 return -EACCES;
 565
 566         sc_attr = container_of(attr, typeof(*sc_attr), kattr);
 567
 568         if (!sc_attr->tstore)
 569                 return -EOPNOTSUPP;
 570
 571         if (!sc_attr->pld_len)
 572                 return -ENOENT;
 573
 574         pld = sc_buf + sc_attr->pld_ofs;        // pld aliases sc_buf -> lock!
 575         pld_len = sc_attr->pld_len;
 576
 577         return sc_attr->tstore(pld, pld_len, buf, count);
 578 }
 579
 580 /*
 581  * Shows the current buffer status:
 582  * "clean": the buffer is in sync with the mtd data
 583  * "dirty": the buffer is out of sync with the mtd data
 584  */
 585 static ssize_t sc_commit_show(struct kobject *kobj, struct kobj_attribute *attr,
 586                               char *buf)
 587 {
 588         const char *str;
 589         char *out = buf;
 590         u32 crc;
 591
 592         read_lock(&sc_bufrwl);
 593         crc = RB_SC_GETCRC();
 594         read_unlock(&sc_bufrwl);
 595
 596         str = (crc) ? "clean" : "dirty";
 597         out += sprintf(out, "%s\n", str);
 598
 599         return out - buf;
 600 }
 601
 602 /*
 603  * Performs buffer flushing:
 604  * This routine expects an input compatible with kstrtobool().
 605  * - a "false" input discards the current changes and reads data back from mtd.
 606  * - a "true" input commits the current changes to mtd.
 607  * If there is no pending changes, this routine is a no-op.
 608  * Handling failures is left as an exercise to userspace.
 609  */
 610 static ssize_t sc_commit_store(struct kobject *kobj, struct kobj_attribute *attr,
 611                               const char *buf, size_t count)
 612 {
 613         struct mtd_info *mtd;
 614         struct erase_info ei;
 615         size_t bytes_rw, ret = count;
 616         bool flush;
 617         u32 crc;
 618
 619         if (!RB_SC_HAS_WRITE_SUPPORT)
 620                 return -EOPNOTSUPP;
 621
 622         read_lock(&sc_bufrwl);
 623         crc = RB_SC_GETCRC();
 624         read_unlock(&sc_bufrwl);
 625
 626         if (crc)
 627                 return count;   // NO-OP
 628
 629         ret = kstrtobool(buf, &flush);
 630         if (ret)
 631                 return ret;
 632
 633         mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG);    // TODO allow override
 634         if (IS_ERR(mtd))
 635                 return -ENODEV;
 636
 637         write_lock(&sc_bufrwl);
 638         if (!flush)     // reread
 639                 ret = mtd_read(mtd, 0, mtd->size, &bytes_rw, sc_buf);
 640         else {  // crc32 + commit
 641                 /*
 642                  * CRC32 is computed on the entire buffer, excluding the CRC
 643                  * value itself. CRC is already null when we reach this point,
 644                  * so we can compute the CRC32 on the buffer as is.
 645                  * The expected CRC32 is Ethernet FCS style, meaning the seed is
 646                  * ~0 and the final result is also bitflipped.
 647                  */
 648
 649                 crc = ~crc32(~0, sc_buf, sc_buflen);
 650                 RB_SC_SETCRC(crc);
 651
 652                 /*
 653                  * The soft_config partition is assumed to be entirely contained
 654                  * in a single eraseblock.
 655                  */
 656
 657                 ei.addr = 0;
 658                 ei.len = mtd->size;
 659                 ret = mtd_erase(mtd, &ei);
 660                 if (!ret)
 661                         ret = mtd_write(mtd, 0, mtd->size, &bytes_rw, sc_buf);
 662
 663                 /*
 664                  * Handling mtd_write() failure here is a tricky situation. The
 665                  * proposed approach is to let userspace deal with retrying,
 666                  * with the caveat that it must try to flush the buffer again as
 667                  * rereading the mtd contents could potentially read garbage.
 668                  * The rationale is: even if we keep a shadow buffer of the
 669                  * original content, there is no guarantee that we will ever be
 670                  * able to write it anyway.
 671                  * Regardless, it appears that RouterBOOT will ignore an invalid
 672                  * soft_config (including a completely wiped segment) and will
 673                  * write back factory defaults when it happens.
 674                  */
 675         }
 676         write_unlock(&sc_bufrwl);
 677
 678         put_mtd_device(mtd);
 679
 680         if (ret)
 681                 goto mtdfail;
 682
 683         if (bytes_rw != sc_buflen) {
 684                 ret = -EIO;
 685                 goto mtdfail;
 686         }
 687
 688         return count;
 689
 690 mtdfail:
 691         RB_SC_CLRCRC(); // mark buffer content as dirty/invalid
 692         return ret;
 693 }
 694
 695 static struct kobj_attribute sc_kattrcommit = __ATTR(commit, RB_SC_RMODE|RB_SC_WMODE, sc_commit_show, sc_commit_store);
 696
 697 int rb_softconfig_init(struct kobject *rb_kobj, struct mtd_info *mtd)
 698 {
 699         size_t bytes_read, buflen;
 700         const u8 *buf;
 701         int i, ret;
 702         u32 magic;
 703
 704         sc_buf = NULL;
 705         sc_kobj = NULL;
 706
 707         ret = __get_mtd_device(mtd);
 708         if (ret)
 709                 return -ENODEV;
 710
 711         sc_buflen = mtd->size;
 712         sc_buf = kmalloc(sc_buflen, GFP_KERNEL);
 713         if (!sc_buf) {
 714                 __put_mtd_device(mtd);
 715                 return -ENOMEM;
 716         }
 717
 718         ret = mtd_read(mtd, 0, sc_buflen, &bytes_read, sc_buf);
 719         __put_mtd_device(mtd);
 720
 721         if (ret)
 722                 goto fail;
 723
 724         if (bytes_read != sc_buflen) {
 725                 ret = -EIO;
 726                 goto fail;
 727         }
 728
 729         /* Check we have what we expect */
 730         magic = *(const u32 *)sc_buf;
 731         if (RB_MAGIC_SOFT != magic) {
 732                 ret = -EINVAL;
 733                 goto fail;
 734         }
 735
 736         /* Skip magic and 32bit CRC located immediately after */
 737         buf = sc_buf + (sizeof(magic) + sizeof(u32));
 738         buflen = sc_buflen - (sizeof(magic) + sizeof(u32));
 739
 740         /* Populate sysfs */
 741         ret = -ENOMEM;
 742         sc_kobj = kobject_create_and_add(RB_MTD_SOFT_CONFIG, rb_kobj);
 743         if (!sc_kobj)
 744                 goto fail;
 745
 746         rwlock_init(&sc_bufrwl);
 747
 748         /* Locate and publish all known tags */
 749         for (i = 0; i < ARRAY_SIZE(sc_attrs); i++) {
 750                 ret = routerboot_tag_find(buf, buflen, sc_attrs[i].tag_id,
 751                                           &sc_attrs[i].pld_ofs, &sc_attrs[i].pld_len);
 752                 if (ret) {
 753                         sc_attrs[i].pld_ofs = sc_attrs[i].pld_len = 0;
 754                         continue;
 755                 }
 756
 757                 /* Account for skipped magic and crc32 */
 758                 sc_attrs[i].pld_ofs += sizeof(magic) + sizeof(u32);
 759
 760                 ret = sysfs_create_file(sc_kobj, &sc_attrs[i].kattr.attr);
 761                 if (ret)
 762                         pr_warn(RB_SC_PR_PFX "Could not create %s sysfs entry (%d)\n",
 763                                sc_attrs[i].kattr.attr.name, ret);
 764         }
 765
 766         /* Finally add the 'commit' attribute */
 767         if (RB_SC_HAS_WRITE_SUPPORT) {
 768                 ret = sysfs_create_file(sc_kobj, &sc_kattrcommit.attr);
 769                 if (ret) {
 770                         pr_err(RB_SC_PR_PFX "Could not create %s sysfs entry (%d), aborting!\n",
 771                                sc_kattrcommit.attr.name, ret);
 772                         goto sysfsfail; // required attribute
 773                 }
 774         }
 775
 776         pr_info("MikroTik RouterBOARD software configuration sysfs driver v" RB_SOFTCONFIG_VER "\n");
 777
 778         return 0;
 779
 780 sysfsfail:
 781         kobject_put(sc_kobj);
 782         sc_kobj = NULL;
 783 fail:
 784         kfree(sc_buf);
 785         sc_buf = NULL;
 786         return ret;
 787 }
 788
 789 void rb_softconfig_exit(void)
 790 {
 791         kobject_put(sc_kobj);
 792         sc_kobj = NULL;
 793         kfree(sc_buf);
 794         sc_buf = NULL;
 795 }