bmips: Build U-Boot into the XG6846 target
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_dovado_tiny-ac.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6
7 / {
8 compatible = "dovado,tiny-ac", "ralink,mt7620a-soc";
9 model = "Dovado Tiny AC";
10
11 leds {
12 compatible = "gpio-leds";
13
14 usb {
15 function = LED_FUNCTION_USB;
16 color = <LED_COLOR_ID_GREEN>;
17 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
18 trigger-sources = <&ohci_port1>, <&ehci_port1>;
19 linux,default-trigger = "usbport";
20 };
21
22 wifi {
23 label = "orange:wifi";
24 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
25 };
26 };
27
28 keys {
29 compatible = "gpio-keys";
30
31 reset {
32 label = "reset";
33 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_RESTART>;
35 };
36 };
37
38 gpio_export {
39 compatible = "gpio-export";
40 #size-cells = <0>;
41
42 usbpower {
43 gpio-export,name = "usbpower";
44 gpio-export,output = <1>;
45 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
46 };
47 };
48 };
49
50 &gpio2 {
51 status = "okay";
52 };
53
54 &gpio3 {
55 status = "okay";
56 };
57
58 &spi0 {
59 status = "okay";
60
61 flash@0 {
62 compatible = "jedec,spi-nor";
63 reg = <0>;
64 spi-max-frequency = <10000000>;
65
66 partitions {
67 compatible = "fixed-partitions";
68 #address-cells = <1>;
69 #size-cells = <1>;
70
71 partition@0 {
72 label = "u-boot";
73 reg = <0x0 0x30000>;
74 read-only;
75 };
76
77 partition@30000 {
78 label = "u-boot-env";
79 reg = <0x30000 0x10000>;
80 read-only;
81 };
82
83 partition@40000 {
84 label = "factory";
85 reg = <0x40000 0x10000>;
86 read-only;
87
88 nvmem-layout {
89 compatible = "fixed-layout";
90 #address-cells = <1>;
91 #size-cells = <1>;
92
93 eeprom_factory_8000: eeprom@8000 {
94 reg = <0x8000 0x200>;
95 };
96 };
97 };
98
99 partition@50000 {
100 compatible = "denx,uimage";
101 label = "firmware";
102 reg = <0x50000 0x7b0000>;
103 };
104 };
105 };
106 };
107
108 &ehci {
109 status = "okay";
110 };
111
112 &ohci {
113 status = "okay";
114 };
115
116 &ethernet {
117 pinctrl-names = "default";
118 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
119
120 mediatek,portmap = "llllw";
121
122 port@4 {
123 status = "okay";
124 phy-mode = "rgmii";
125 phy-handle = <&phy4>;
126 };
127
128 port@5 {
129 status = "okay";
130 phy-mode = "rgmii";
131 phy-handle = <&phy5>;
132 };
133
134 mdio-bus {
135 status = "okay";
136
137 phy4: ethernet-phy@4 {
138 reg = <4>;
139 phy-mode = "rgmii";
140 };
141
142 phy5: ethernet-phy@5 {
143 reg = <5>;
144 phy-mode = "rgmii";
145 };
146 };
147 };
148
149 &gsw {
150 mediatek,port4-gmac;
151 mediatek,ephy-base = /bits/ 8 <8>;
152 };
153
154 &pcie {
155 status = "okay";
156 };
157
158 &state_default {
159 gpio {
160 groups = "uartf", "nd_sd", "wled";
161 function = "gpio";
162 };
163 };
164
165 &pcie0 {
166 mt76@0,0 {
167 reg = <0x0000 0 0 0 0>;
168 nvmem-cells = <&eeprom_factory_8000>;
169 nvmem-cell-names = "eeprom";
170 ieee80211-freq-limit = <5000000 6000000>;
171 };
172 };