target/linux/ramips/dts/mt7620a_edimax_ew-747x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include "mt7620a.dtsi"
   6
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9
  10 / {
  11         compatible = "ralink,mt7620a-soc";
  12
  13         aliases {
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18         };
  19
  20         chosen {
  21                 bootargs = "console=ttyS0,57600";
  22         };
  23
  24         keys {
  25                 compatible = "gpio-keys";
  26
  27                 reset_wps {
  28                         label = "reset_wps";
  29                         gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
  30                         linux,code = <KEY_RESTART>;
  31                 };
  32
  33                 switch_high {
  34                         label = "switch high";
  35                         gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
  36                         linux,code = <BTN_0>;
  37                         linux,input-type = <EV_SW>;
  38                 };
  39
  40                 switch_off {
  41                         label = "switch off";
  42                         gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
  43                         linux,code = <BTN_1>;
  44                         linux,input-type = <EV_SW>;
  45                 };
  46         };
  47 };
  48
  49 &gpio1 {
  50         status = "okay";
  51 };
  52
  53 &gpio2 {
  54         status = "okay";
  55 };
  56
  57 &spi0 {
  58         status = "okay";
  59
  60         flash@0 {
  61                 compatible = "jedec,spi-nor";
  62                 reg = <0>;
  63                 spi-max-frequency = <10000000>;
  64
  65                 partitions {
  66                         compatible = "fixed-partitions";
  67                         #address-cells = <1>;
  68                         #size-cells = <1>;
  69
  70                         partition@0 {
  71                                 label = "u-boot";
  72                                 reg = <0x0 0x30000>;
  73                                 read-only;
  74                         };
  75
  76                         partition@30000 {
  77                                 label = "u-boot-env";
  78                                 reg = <0x30000 0x10000>;
  79                                 read-only;
  80                         };
  81
  82                         factory: partition@40000 {
  83                                 label = "factory";
  84                                 reg = <0x40000 0x10000>;
  85                                 read-only;
  86                         };
  87
  88                         partition@50000 {
  89                                 label = "cimage";
  90                                 reg = <0x50000 0x20000>;
  91                                 read-only;
  92                         };
  93
  94                         partition@70000 {
  95                                 compatible = "edimax,uimage";
  96                                 label = "firmware";
  97                                 reg = <0x00070000 0x00790000>;
  98                         };
  99                 };
 100         };
 101 };
 102
 103 &pinctrl {
 104         state_default: pinctrl0 {
 105                 gpio {
 106                         ralink,group = "i2c", "uartf", "nd_sd", "rgmii2";
 107                         ralink,function = "gpio";
 108                 };
 109         };
 110
 111         phy_reset_pins: phy-reset {
 112                 gpio {
 113                         ralink,group = "spi refclk";
 114                         ralink,function = "gpio";
 115                 };
 116         };
 117 };
 118
 119 &ethernet {
 120
 121         status = "okay";
 122         mtd-mac-address = <&factory 0x4>;
 123
 124         pinctrl-names = "default";
 125         pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>;
 126
 127         mediatek,portmap = "l";
 128         mediatek,mdio-mode = <1>;
 129
 130         phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 131         phy-reset-duration = <30>;
 132
 133         port@5 {
 134                 status = "okay";
 135                 mediatek,fixed-link = <1000 1 1 1>;
 136                 phy-mode = "rgmii";
 137         };
 138
 139         mdio-bus {
 140                 status = "okay";
 141
 142                 phy0: ethernet-phy@0 {
 143                         status = "disabled";
 144                         reg = <0>;
 145                         phy-mode = "rgmii";
 146                 };
 147
 148                 phy1: ethernet-phy@1 {
 149                         status = "disabled";
 150                         reg = <1>;
 151                         phy-mode = "rgmii";
 152                 };
 153
 154                 phy2: ethernet-phy@2 {
 155                         status = "disabled";
 156                         reg = <2>;
 157                         phy-mode = "rgmii";
 158                 };
 159
 160                 phy3: ethernet-phy@3 {
 161                         status = "disabled";
 162                         reg = <3>;
 163                         phy-mode = "rgmii";
 164                 };
 165
 166                 phy4: ethernet-phy@4 {
 167                         status = "disabled";
 168                         reg = <4>;
 169                         phy-mode = "rgmii";
 170                 };
 171         };
 172 };
 173
 174 &gsw {
 175         mediatek,port5 = "gmac";
 176 };
 177
 178 &wmac {
 179         ralink,mtd-eeprom = <&factory 0>;
 180 };
 181
 182 &pcie {
 183         status = "okay";
 184 };
 185
 186 &pcie0 {
 187         wifi@0,0 {
 188                 reg = <0x0000 0 0 0 0>;
 189                 mediatek,mtd-eeprom = <&factory 0x8000>;
 190                 mediatek,2ghz = <0>;
 191         };
 192 };