apk: update to latest HEAD 2024-05-18
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_fon_fon2601.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "fon,fon2601", "ralink,mt7620a-soc";
10 model = "Fon FON2601";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 leds {
20 compatible = "gpio-leds";
21
22 led_power: power_r {
23 label = "red:power";
24 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
25 };
26
27 internet_g {
28 label = "green:internet";
29 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
30 };
31
32 net_g {
33 label = "green:net";
34 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
35 };
36
37 wifi_g {
38 label = "green:wifi";
39 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
40 };
41 };
42
43 keys {
44 compatible = "gpio-keys";
45
46 reset {
47 label = "reset";
48 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_RESTART>;
50 };
51 };
52 };
53
54 &spi0 {
55 status = "okay";
56
57 flash@0 {
58 compatible = "jedec,spi-nor";
59 reg = <0>;
60 spi-max-frequency = <10000000>;
61
62 partitions {
63 compatible = "fixed-partitions";
64 #address-cells = <1>;
65 #size-cells = <1>;
66
67 partition@0 {
68 label = "u-boot";
69 reg = <0x0 0x30000>;
70 read-only;
71 };
72
73 partition@30000 {
74 label = "u-boot-env";
75 reg = <0x30000 0x10000>;
76 read-only;
77 };
78
79 factory: partition@40000 {
80 label = "factory";
81 reg = <0x40000 0x10000>;
82 read-only;
83 };
84
85 partition@50000 {
86 compatible = "openwrt,uimage", "denx,uimage";
87 openwrt,padding = <32>;
88 label = "firmware";
89 reg = <0x50000 0xf90000>;
90 };
91
92 partition@fe0000 {
93 label = "board_data";
94 reg = <0xfe0000 0x20000>;
95 read-only;
96 };
97 };
98 };
99 };
100
101 &state_default {
102 gpio {
103 groups = "i2c", "uartf";
104 function = "gpio";
105 };
106 nd_sd {
107 groups = "nd_sd";
108 function = "sd";
109 };
110 spi_cs {
111 groups = "spi refclk";
112 function = "spi refclk";
113 };
114 };
115
116 &ethernet {
117 pinctrl-names = "default";
118 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
119
120 nvmem-cells = <&macaddr_factory_4>;
121 nvmem-cell-names = "mac-address";
122
123 port@4 {
124 status = "okay";
125 phy-handle = <&phy4>;
126 phy-mode = "rgmii";
127 };
128
129 mdio-bus {
130 status = "okay";
131
132 phy4: ethernet-phy@4 {
133 reg = <4>;
134 phy-mode = "rgmii";
135 };
136 };
137 };
138
139 &gsw {
140 mediatek,port4-gmac;
141 mediatek,ephy-base = /bits/ 8 <8>;
142 };
143
144 &wmac {
145 ralink,mtd-eeprom = <&factory 0x0>;
146
147 pinctrl-names = "default", "pa_gpio";
148 pinctrl-0 = <&pa_pins>, <&wled_pins>;
149 pinctrl-1 = <&pa_gpio_pins>, <&wled_pins>;
150 };
151
152 &pcie {
153 status = "okay";
154 };
155 &pcie0 {
156 wifi@0,0 {
157 compatible = "pci14c3,7662";
158 reg = <0x0000 0 0 0 0>;
159 mediatek,mtd-eeprom = <&factory 0x8000>;
160 ieee80211-freq-limit = <5000000 6000000>;
161 };
162 };
163
164 &ehci {
165 status = "okay";
166 };
167
168 &ohci {
169 status = "okay";
170 };
171
172 &factory {
173 compatible = "nvmem-cells";
174 #address-cells = <1>;
175 #size-cells = <1>;
176
177 macaddr_factory_4: macaddr@4 {
178 reg = <0x4 0x6>;
179 };
180 };