apk: update to latest HEAD 2024-05-18
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3052_zyxel_keenetic.dts
1 #include "rt3050.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "zyxel,keenetic", "ralink,rt3052-soc";
8 model = "ZyXEL Keenetic";
9
10 aliases {
11 led-boot = &led_power;
12 led-failsafe = &led_power;
13 led-running = &led_power;
14 led-upgrade = &led_power;
15 };
16
17 flash@1f000000 {
18 compatible = "cfi-flash";
19 reg = <0x1f000000 0x800000>;
20 bank-width = <2>;
21 device-width = <2>;
22
23 partitions {
24 compatible = "fixed-partitions";
25 #address-cells = <1>;
26 #size-cells = <1>;
27
28 partition@0 {
29 label = "u-boot";
30 reg = <0x0 0x30000>;
31 read-only;
32 };
33
34 partition@30000 {
35 label = "u-boot-env";
36 reg = <0x30000 0x10000>;
37 read-only;
38 };
39
40 factory: partition@40000 {
41 label = "factory";
42 reg = <0x40000 0x10000>;
43 read-only;
44 };
45
46 partition@50000 {
47 compatible = "denx,uimage";
48 label = "firmware";
49 reg = <0x50000 0x7b0000>;
50 };
51 };
52 };
53
54 leds {
55 compatible = "gpio-leds";
56
57 led_power: power {
58 label = "green:power";
59 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
60 };
61
62 usb {
63 label = "green:usb";
64 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
65 trigger-sources = <&otg_port1>;
66 linux,default-trigger = "usbport";
67 };
68
69 wps {
70 label = "green:wps";
71 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
72 };
73 };
74
75 keys {
76 compatible = "gpio-keys-polled";
77 poll-interval = <20>;
78
79 reset {
80 label = "reset";
81 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_RESTART>;
83 };
84
85 rfkill {
86 label = "rfkill";
87 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
88 linux,code = <KEY_RFKILL>;
89 linux,input-type = <EV_SW>;
90 };
91
92 wps {
93 label = "wps";
94 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
95 linux,code = <KEY_WPS_BUTTON>;
96 };
97 };
98 };
99
100 &state_default {
101 gpio {
102 groups = "uartf";
103 function = "gpio";
104 };
105 };
106
107 &ethernet {
108 nvmem-cells = <&macaddr_factory_28>;
109 nvmem-cell-names = "mac-address";
110 };
111
112 &esw {
113 mediatek,portmap = <0x2f>;
114 };
115
116 &wmac {
117 ralink,mtd-eeprom = <&factory 0x0>;
118 };
119
120 &otg {
121 status = "okay";
122 };
123
124 &factory {
125 compatible = "nvmem-cells";
126 #address-cells = <1>;
127 #size-cells = <1>;
128
129 macaddr_factory_28: macaddr@28 {
130 reg = <0x28 0x6>;
131 };
132 };