5 days ago | Sean Khan | tools: mold: update to 2.31.0 - [RISC-V] __global_pointer$ symbol is... |
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10 days ago | Weijie Gao | loongarch64: new target LoongArch is a new RISC ISA developed by Loongson. It... MIPS or RISC-V. LoongArch includes both 32... |
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11 days ago | Zoltan HERPAI | opensbi: bump to 1.4 Upgrade the OpenSBI firmware used by RISC-V CPUs to 1.4. |
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2024-04-14 | Robert Marko | tools: libdeflate: update to 1.20 * Added some basic optimizations for RISC-V. |
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2024-04-14 | Hannu Nyman | toolchain/musl: Update to 1.2.5 ports: loongarch64 and riscv32. Minor changes to the printf... ...requirements. TLSDESC support for riscv64 has also bugs affecting TLSDESC on arm, riscv64 icache flushing, and - riscv64 TLSDESC support - riscv32 - riscv64 icache flush operation was... |
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2024-03-25 | Goetz Goerisch | realtek: add Zyxel GS1900-8 v2 Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com> |
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2024-03-23 | Qingfang Deng | kernel: support RISC-V PMU kernel: support RISC-V PMU Add RISC-V PMU config symbols and enable... |
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2024-03-10 | Zoltan HERPAI | starfive: add new target for StarFive JH7100/7110 SoC - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - StarFive JH7110 quad-core RISC-V (U74, RV64GC) |
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2024-03-08 | Qingfang Deng | kernel: enable KASAN option for more architectures ...architectures, such as ARM, PPC32 and RISC-V 64. |
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2024-02-29 | Zoltan HERPAI | d1: add new target ...adds support for the Allwinner D1 RISC-V based SoCs. - RISC-V single-core T-Head C906 (RV64GCV) |
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2023-09-28 | Zoltan HERPAI | sifiveu: remove upstreamed patches, refresh remaining... 0002-riscv-sifive-unmatched-update-regulators... 0003-riscv-sifive-unmatched-define-PWM-LEDs... 0006-riscv-sbi-srst-support.patch |
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2023-08-14 | Andre Heider | tools: mold: update to 2.1.0 - [RISC-V] R_RISCV_SET_ULEB128 and R_RISCV_SUB_... - [RISC-V] We now merge input .riscv.attributes... |
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2023-07-30 | Nick Hainke | toolchain: gcc: updat to 13.2 - patches-13.x/700-RISCV-Inline-subword-atomic-ops.patch - patches-13.x/701-riscv-linux-Don-t-add-latomic-with... |
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2023-06-25 | Hauke Mehrtens | procd: update to latest git HEAD 2db8365 system: add RISC-V CPU info |
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2023-06-11 | Tianling Shen | toolchain: gcc: backport inline subword atomic support... ...inline subword atomic support for riscv RISC-V has no support for subword atomic... |
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2023-05-28 | Zoltan HERPAI | sifiveu: add new target for SiFive U-based boards RISC-V is a new CPU architecture aimed... - CPU: SiFive FU540 quad-core RISC-V (U54, RV64IMAFDC or RV64GC) - CPU: SiFive FU740 quad-core RISC-V (U74, RV64IMAFDCB or RV64GCB) |
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2023-05-28 | Zoltan HERPAI | firmware-utils: ptgen: add SiFive-related GUID types The SiFive RISC-V SoCs use two special partition... |
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2023-05-28 | Zoltan HERPAI | openssl: add linux-riscv64 into the targets list openssl: add linux-riscv64 into the targets list Add "linux-riscv64-openwrt" into openssl configurations... on riscv64. |
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2023-05-28 | Zoltan HERPAI | opensbi: add package for RISC-V opensbi: add package for RISC-V |
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2023-05-28 | Zoltan HERPAI | generic: groundwork for RISC-V generic: groundwork for RISC-V Add build infrastructure for RISC-V. |
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2023-05-15 | Linhui Liu | toolchain/musl: update to 1.2.4 - real vfork on riscv64 ...on or1k, microblaze, mips, and riscv |
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2023-03-19 | Mathew McBride | tools: update elf.h ...newer architectures like Arm64 and RISC-V. |
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2023-01-06 | Christian Schmidbauer | github: add command for device ...Christian Schmidbauer <github@grische.xyz> |
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2022-08-13 | Nick Hainke | binutils: update to 2.39 (Currently: AVR, RiscV, s390, x86, x86_64). |
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2022-07-31 | Michael Pratt | tools/libressl: disable assembly code for all hosts and for some RISC host archs like armv7l, aarch64... |
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2021-09-12 | Hans Dedecker | glibc: update to latest 2.33 HEAD (bug 28213) 9c676ef514 RISC-V: Update rv64 ULPs |
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2020-11-01 | Hauke Mehrtens | gdb: Update to version 10.1 - RISC-V GNU/Linux |
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2020-11-01 | Hauke Mehrtens | toolchain: gdb: Update to version 10.1 - RISC-V GNU/Linux |
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2019-10-15 | Koen Vandeputte | gdb: bump to 8.3.1 - RISC-V GNU/Linux (riscv*-*-linux*) - RISC-V FreeBSD (riscv*-*-freebsd*) - OpenRISC GNU/Linux (or1k*-*-linux*) * Target description support on RISC-V targets. |
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2019-10-15 | Koen Vandeputte | toolchain/gdb: bump to 8.3.1 - RISC-V GNU/Linux (riscv*-*-linux*) - RISC-V FreeBSD (riscv*-*-freebsd*) - OpenRISC GNU/Linux (or1k*-*-linux*) * Target description support on RISC-V targets. |
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2019-10-15 | Koen Vandeputte | toolchain/musl: bump to version 1.1.24 - riscv64 mcontext_t mismatch glibc's... - riscv64 atomics weren't compiler barriers - riscv64 atomics had broken asm constraints... |
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2019-09-01 | Tomasz Maciej Nowak | grub2: bump to 2.04 * RISC-V support. |
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2019-07-31 | Koen Vandeputte | toolchain/musl: bump to version 1.1.23 - riscv64 port |
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2018-10-06 | Jason A. Donenfeld | wireguard: bump to 0.0.20181006 ...patch to ARM tree for adjusting RiscPC's cflags to be -march=armv3 so |
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2018-09-07 | Koen Vandeputte | gdb: bump to 8.2 RiscV ELF (riscv*-*-elf) |
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2018-09-07 | Koen Vandeputte | toolchain/gdb: bump to 8.2 RiscV ELF (riscv*-*-elf) |
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2018-08-01 | Koen Vandeputte | toolchain/gdb: bump to 8.1.1 ** OpenRISC ELF (or1k*-*-elf) |
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